# SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Allwinner A83t EMAC Device Tree Bindings maintainers: - Chen-Yu Tsai - Maxime Ripard properties: compatible: oneOf: - const: allwinner,sun8i-a83t-emac - const: allwinner,sun8i-h3-emac - const: allwinner,sun8i-r40-emac - const: allwinner,sun8i-v3s-emac - const: allwinner,sun50i-a64-emac - items: - const: allwinner,sun50i-h6-emac - const: allwinner,sun50i-a64-emac reg: maxItems: 1 interrupts: maxItems: 1 interrupt-names: const: macirq clocks: maxItems: 1 clock-names: const: stmmaceth syscon: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to the device containing the EMAC or GMAC clock register required: - compatible - reg - interrupts - interrupt-names - clocks - clock-names - resets - reset-names - phy-handle - phy-mode - syscon allOf: - $ref: "snps,dwmac.yaml#" - if: properties: compatible: contains: enum: - allwinner,sun8i-a83t-emac - allwinner,sun8i-h3-emac - allwinner,sun8i-v3s-emac - allwinner,sun50i-a64-emac then: properties: allwinner,tx-delay-ps: default: 0 minimum: 0 maximum: 700 multipleOf: 100 description: External RGMII PHY TX clock delay chain value in ps. allwinner,rx-delay-ps: default: 0 minimum: 0 maximum: 3100 multipleOf: 100 description: External RGMII PHY TX clock delay chain value in ps. - if: properties: compatible: contains: enum: - allwinner,sun8i-r40-emac then: properties: allwinner,rx-delay-ps: default: 0 minimum: 0 maximum: 700 multipleOf: 100 description: External RGMII PHY TX clock delay chain value in ps. - if: properties: compatible: contains: enum: - allwinner,sun8i-h3-emac - allwinner,sun8i-v3s-emac then: properties: allwinner,leds-active-low: $ref: /schemas/types.yaml#/definitions/flag description: EPHY LEDs are active low. mdio-mux: type: object properties: compatible: const: allwinner,sun8i-h3-mdio-mux mdio-parent-bus: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to EMAC MDIO. mdio@1: type: object description: Internal MDIO Bus properties: "#address-cells": const: 1 "#size-cells": const: 0 compatible: const: allwinner,sun8i-h3-mdio-internal reg: const: 1 patternProperties: "^ethernet-phy@[0-9a-f]$": type: object description: Integrated PHY node properties: clocks: maxItems: 1 resets: maxItems: 1 required: - clocks - resets mdio@2: type: object description: External MDIO Bus (H3 only) properties: "#address-cells": const: 1 "#size-cells": const: 0 reg: const: 2 required: - compatible - mdio-parent-bus - mdio@1 unevaluatedProperties: false examples: - | ethernet@1c0b000 { compatible = "allwinner,sun8i-h3-emac"; syscon = <&syscon>; reg = <0x01c0b000 0x104>; interrupts = <0 82 1>; interrupt-names = "macirq"; resets = <&ccu 12>; reset-names = "stmmaceth"; clocks = <&ccu 27>; clock-names = "stmmaceth"; phy-handle = <&int_mii_phy>; phy-mode = "mii"; allwinner,leds-active-low; mdio1: mdio { #address-cells = <1>; #size-cells = <0>; compatible = "snps,dwmac-mdio"; }; mdio-mux { compatible = "allwinner,sun8i-h3-mdio-mux"; #address-cells = <1>; #size-cells = <0>; mdio-parent-bus = <&mdio1>; int_mii_phy: mdio@1 { compatible = "allwinner,sun8i-h3-mdio-internal"; reg = <1>; #address-cells = <1>; #size-cells = <0>; ethernet-phy@1 { reg = <1>; clocks = <&ccu 67>; resets = <&ccu 39>; phy-is-integrated; }; }; mdio@2 { reg = <2>; #address-cells = <1>; #size-cells = <0>; }; }; }; - | ethernet@1c0b000 { compatible = "allwinner,sun8i-h3-emac"; syscon = <&syscon>; reg = <0x01c0b000 0x104>; interrupts = <0 82 1>; interrupt-names = "macirq"; resets = <&ccu 12>; reset-names = "stmmaceth"; clocks = <&ccu 27>; clock-names = "stmmaceth"; phy-handle = <&ext_rgmii_phy>; phy-mode = "rgmii"; allwinner,leds-active-low; mdio2: mdio { #address-cells = <1>; #size-cells = <0>; compatible = "snps,dwmac-mdio"; }; mdio-mux { compatible = "allwinner,sun8i-h3-mdio-mux"; #address-cells = <1>; #size-cells = <0>; mdio-parent-bus = <&mdio2>; mdio@1 { compatible = "allwinner,sun8i-h3-mdio-internal"; reg = <1>; #address-cells = <1>; #size-cells = <0>; ethernet-phy@1 { reg = <1>; clocks = <&ccu 67>; resets = <&ccu 39>; }; }; mdio@2 { reg = <2>; #address-cells = <1>; #size-cells = <0>; ext_rgmii_phy: ethernet-phy@1 { reg = <1>; }; }; }; }; - | ethernet@1c0b000 { compatible = "allwinner,sun8i-a83t-emac"; syscon = <&syscon>; reg = <0x01c0b000 0x104>; interrupts = <0 82 1>; interrupt-names = "macirq"; resets = <&ccu 13>; reset-names = "stmmaceth"; clocks = <&ccu 27>; clock-names = "stmmaceth"; phy-handle = <&ext_rgmii_phy1>; phy-mode = "rgmii"; mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; #size-cells = <0>; ext_rgmii_phy1: ethernet-phy@1 { reg = <1>; }; }; }; ...