# SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/allwinner,sun5i-a13-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Allwinner A13 USB PHY maintainers: - Chen-Yu Tsai - Maxime Ripard properties: "#phy-cells": const: 1 compatible: const: allwinner,sun5i-a13-usb-phy reg: items: - description: PHY Control registers - description: PHY PMU1 registers reg-names: items: - const: phy_ctrl - const: pmu1 clocks: maxItems: 1 description: USB OTG PHY bus clock clock-names: const: usb_phy resets: items: - description: USB OTG reset - description: USB Host 1 Controller reset reset-names: items: - const: usb0_reset - const: usb1_reset usb0_id_det-gpios: maxItems: 1 description: GPIO to the USB OTG ID pin usb0_vbus_det-gpios: maxItems: 1 description: GPIO to the USB OTG VBUS detect pin usb0_vbus_power-supply: description: Power supply to detect the USB OTG VBUS usb0_vbus-supply: description: Regulator controlling USB OTG VBUS usb1_vbus-supply: description: Regulator controlling USB1 Host controller required: - "#phy-cells" - compatible - clocks - clock-names - reg - reg-names - resets - reset-names additionalProperties: false examples: - | #include #include #include phy@1c13400 { #phy-cells = <1>; compatible = "allwinner,sun5i-a13-usb-phy"; reg = <0x01c13400 0x10>, <0x01c14800 0x4>; reg-names = "phy_ctrl", "pmu1"; clocks = <&ccu CLK_USB_PHY0>; clock-names = "usb_phy"; resets = <&ccu RST_USB_PHY0>, <&ccu RST_USB_PHY1>; reset-names = "usb0_reset", "usb1_reset"; usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */ usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */ usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; };