# SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Allwinner A80 USB PHY maintainers: - Chen-Yu Tsai - Maxime Ripard properties: "#phy-cells": const: 0 compatible: const: allwinner,sun9i-a80-usb-phy reg: maxItems: 1 clocks: anyOf: - maxItems: 1 description: Main PHY Clock - items: - description: Main PHY clock - description: HSIC 12MHz clock - description: HSIC 480MHz clock clock-names: oneOf: - const: phy - items: - const: phy - const: hsic_12M - const: hsic_480M resets: minItems: 1 items: - description: Normal USB PHY reset - description: HSIC Reset reset-names: minItems: 1 items: - const: phy - const: hsic phy_type: const: hsic description: When absent, the PHY type will be assumed to be normal USB. phy-supply: description: Regulator that powers VBUS required: - "#phy-cells" - compatible - reg - clocks - clock-names - resets - reset-names additionalProperties: false if: properties: phy_type: const: hsic required: - phy_type then: properties: clocks: maxItems: 3 clock-names: maxItems: 3 resets: maxItems: 2 reset-names: maxItems: 2 examples: - | #include #include usbphy1: phy@a00800 { compatible = "allwinner,sun9i-a80-usb-phy"; reg = <0x00a00800 0x4>; clocks = <&usb_clocks CLK_USB0_PHY>; clock-names = "phy"; resets = <&usb_clocks RST_USB0_PHY>; reset-names = "phy"; phy-supply = <®_usb1_vbus>; #phy-cells = <0>; }; - | #include #include usbphy3: phy@a02800 { compatible = "allwinner,sun9i-a80-usb-phy"; reg = <0x00a02800 0x4>; clocks = <&usb_clocks CLK_USB2_PHY>, <&usb_clocks CLK_USB_HSIC>, <&usb_clocks CLK_USB2_HSIC>; clock-names = "phy", "hsic_12M", "hsic_480M"; resets = <&usb_clocks RST_USB2_PHY>, <&usb_clocks RST_USB2_HSIC>; reset-names = "phy", "hsic"; phy_type = "hsic"; phy-supply = <®_usb3_vbus>; #phy-cells = <0>; };