Freescale i.MX General Power Controller ======================================= The i.MX6 General Power Control (GPC) block contains DVFS load tracking counters and Power Gating Control (PGC). Required properties: - compatible: Should be one of the following: - fsl,imx6q-gpc - fsl,imx6qp-gpc - fsl,imx6sl-gpc - fsl,imx6sx-gpc - reg: should be register base and length as documented in the datasheet - interrupts: Should contain one interrupt specifier for the GPC interrupt - clocks: Must contain an entry for each entry in clock-names. See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. - clock-names: Must include the following entries: - ipg The power domains are generic power domain providers as documented in Documentation/devicetree/bindings/power/power_domain.txt. They are described as subnodes of the power gating controller 'pgc' node of the GPC and should contain the following: Required properties: - reg: Must contain the DOMAIN_INDEX of this power domain The following DOMAIN_INDEX values are valid for i.MX6Q: ARM_DOMAIN 0 PU_DOMAIN 1 The following additional DOMAIN_INDEX value is valid for i.MX6SL: DISPLAY_DOMAIN 2 The following additional DOMAIN_INDEX value is valid for i.MX6SX: PCI_DOMAIN 3 - #power-domain-cells: Should be 0 Optional properties: - clocks: a number of phandles to clocks that need to be enabled during domain power-up sequencing to ensure reset propagation into devices located inside this power domain - power-supply: a phandle to the regulator powering this domain Example: gpc: gpc@20dc000 { compatible = "fsl,imx6q-gpc"; reg = <0x020dc000 0x4000>; interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>, <0 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_IPG>; clock-names = "ipg"; pgc { #address-cells = <1>; #size-cells = <0>; power-domain@0 { reg = <0>; #power-domain-cells = <0>; }; pd_pu: power-domain@1 { reg = <1>; #power-domain-cells = <0>; power-supply = <®_pu>; clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>, <&clks IMX6QDL_CLK_GPU3D_SHADER>, <&clks IMX6QDL_CLK_GPU2D_CORE>, <&clks IMX6QDL_CLK_GPU2D_AXI>, <&clks IMX6QDL_CLK_OPENVG_AXI>, <&clks IMX6QDL_CLK_VPU_AXI>; }; }; }; Specifying power domain for IP modules ====================================== IP cores belonging to a power domain should contain a 'power-domains' property that is a phandle pointing to the power domain the device belongs to. Example of a device that is part of the PU power domain: vpu: vpu@2040000 { reg = <0x02040000 0x3c000>; /* ... */ power-domains = <&pd_pu>; /* ... */ };