Xilinx Zynq QSPI controller Device Tree Bindings ------------------------------------------------------------------- Required properties: - compatible : Should be "xlnx,zynq-qspi-1.0". - reg : Physical base address and size of QSPI registers map. - interrupts : Property with a value describing the interrupt number. - clock-names : List of input clock names - "ref_clk", "pclk" (See clock bindings for details). - clocks : Clock phandles (see clock bindings for details). Optional properties: - num-cs : Number of chip selects used. Example: qspi: spi@e000d000 { compatible = "xlnx,zynq-qspi-1.0"; reg = <0xe000d000 0x1000>; interrupt-parent = <&intc>; interrupts = <0 19 4>; clock-names = "ref_clk", "pclk"; clocks = <&clkc 10>, <&clkc 43>; num-cs = <1>; };