/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2019-2020 NXP * Dong Aisheng */ #define IMX_LPCG_CLK_0 0 #define IMX_LPCG_CLK_1 4 #define IMX_LPCG_CLK_2 8 #define IMX_LPCG_CLK_3 12 #define IMX_LPCG_CLK_4 16 #define IMX_LPCG_CLK_5 20 #define IMX_LPCG_CLK_6 24 #define IMX_LPCG_CLK_7 28