// SPDX-License-Identifier: GPL-2.0-only /* * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x * * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz */ /dts-v1/; #include "am33xx.dtsi" #include / { cpus { cpu@0 { cpu0-supply = <&vdd1_reg>; }; }; memory@80000000 { device_type = "memory"; reg = <0x80000000 0x10000000>; /* 256 MB */ }; leds { pinctrl-names = "default"; pinctrl-0 = <&leds_pins>; compatible = "gpio-leds"; led0 { label = "com:green:user"; gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; default-state = "on"; }; }; vbat: fixedregulator0 { compatible = "regulator-fixed"; regulator-name = "vbat"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-boot-on; }; vmmc: fixedregulator1 { compatible = "regulator-fixed"; regulator-name = "vmmc"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; }; &am33xx_pinmux { i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) >; }; nandflash_pins: pinmux_nandflash_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_30 */ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0) >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) >; }; leds_pins: pinmux_leds_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */ >; }; }; &mac { status = "okay"; }; &davinci_mdio { status = "okay"; ethphy0: ethernet-phy@0 { reg = <0>; }; ethphy1: ethernet-phy@1 { reg = <1>; }; }; &cpsw_emac0 { phy-handle = <ðphy0>; phy-mode = "rmii"; }; &cpsw_emac1 { phy-handle = <ðphy1>; phy-mode = "rmii"; }; &elm { status = "okay"; }; &gpmc { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&nandflash_pins>; ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */ nand@0,0 { compatible = "ti,omap2-nand"; reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ nand-bus-width = <8>; ti,nand-ecc-opt = "bch8"; gpmc,device-width = <1>; gpmc,sync-clk-ps = <0>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <44>; gpmc,cs-wr-off-ns = <44>; gpmc,adv-on-ns = <6>; gpmc,adv-rd-off-ns = <34>; gpmc,adv-wr-off-ns = <44>; gpmc,we-on-ns = <0>; gpmc,we-off-ns = <40>; gpmc,oe-on-ns = <0>; gpmc,oe-off-ns = <54>; gpmc,access-ns = <64>; gpmc,rd-cycle-ns = <82>; gpmc,wr-cycle-ns = <82>; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; gpmc,wr-access-ns = <40>; gpmc,wr-data-mux-bus-ns = <0>; #address-cells = <1>; #size-cells = <1>; ti,elm-id = <&elm>; /* MTD partition table */ partition@0 { label = "SPL"; reg = <0x00000000 0x000080000>; }; partition@1 { label = "U-boot"; reg = <0x00080000 0x001e0000>; }; partition@2 { label = "U-Boot Env"; reg = <0x00260000 0x00020000>; }; partition@3 { label = "Kernel"; reg = <0x00280000 0x00500000>; }; partition@4 { label = "File System"; reg = <0x00780000 0x007880000>; }; }; }; &i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; clock-frequency = <400000>; tps: tps@2d { reg = <0x2d>; }; }; &mmc1 { status = "okay"; vmmc-supply = <&vmmc>; bus-width = <4>; }; &uart0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; }; &usb { status = "okay"; }; &usb_ctrl_mod { status = "okay"; }; &usb0_phy { status = "okay"; }; &usb1_phy { status = "okay"; }; &usb0 { status = "okay"; }; &usb1 { status = "okay"; dr_mode = "host"; }; &cppi41dma { status = "okay"; }; #include "tps65910.dtsi" &tps { vcc1-supply = <&vbat>; vcc2-supply = <&vbat>; vcc3-supply = <&vbat>; vcc4-supply = <&vbat>; vcc5-supply = <&vbat>; vcc6-supply = <&vbat>; vcc7-supply = <&vbat>; vccio-supply = <&vbat>; regulators { vrtc_reg: regulator@0 { regulator-always-on; }; vio_reg: regulator@1 { regulator-always-on; }; vdd1_reg: regulator@2 { /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ regulator-name = "vdd_mpu"; regulator-min-microvolt = <912500>; regulator-max-microvolt = <1312500>; regulator-boot-on; regulator-always-on; }; vdd2_reg: regulator@3 { /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ regulator-name = "vdd_core"; regulator-min-microvolt = <912500>; regulator-max-microvolt = <1150000>; regulator-boot-on; regulator-always-on; }; vdd3_reg: regulator@4 { regulator-always-on; }; vdig1_reg: regulator@5 { regulator-always-on; }; vdig2_reg: regulator@6 { regulator-always-on; }; vpll_reg: regulator@7 { regulator-always-on; }; vdac_reg: regulator@8 { regulator-always-on; }; vaux1_reg: regulator@9 { regulator-always-on; }; vaux2_reg: regulator@10 { regulator-always-on; }; vaux33_reg: regulator@11 { regulator-always-on; }; vmmc_reg: regulator@12 { regulator-always-on; }; }; };