/* * pdu001.dts * * EETS GmbH PDU001 board device tree file * * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/ * * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ * * SPDX-License-Identifier: GPL-2.0+ */ /dts-v1/; #include "am33xx.dtsi" #include #include / { model = "EETS,PDU001"; compatible = "ti,am33xx"; chosen { stdout-path = &uart3; }; cpus { cpu@0 { cpu0-supply = <&vdd1_reg>; }; }; memory { device_type = "memory"; reg = <0x80000000 0x10000000>; /* 256 MB */ }; vbat: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "vbat"; regulator-min-microvolt = <3600000>; regulator-max-microvolt = <3600000>; regulator-boot-on; }; lis3_reg: fixedregulator@1 { compatible = "regulator-fixed"; regulator-name = "lis3_reg"; regulator-boot-on; }; panel { compatible = "ti,tilcdc,panel"; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&lcd_pins_s0>; panel-info { ac-bias = <255>; ac-bias-intrpt = <0>; dma-burst-sz = <16>; bpp = <16>; fdd = <0x80>; sync-edge = <0>; sync-ctrl = <1>; raster-order = <0>; fifo-th = <0>; }; display-timings { 240x320p16 { clock-frequency = <6500000>; hactive = <240>; vactive = <320>; hfront-porch = <6>; hback-porch = <6>; hsync-len = <1>; vback-porch = <6>; vfront-porch = <6>; vsync-len = <1>; hsync-active = <0>; vsync-active = <0>; pixelclk-active = <1>; de-active = <0>; }; }; }; }; &am33xx_pinmux { pinctrl-names = "default"; pinctrl-0 = <&clkout2_pin>; i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ >; }; i2c1_pins: pinmux_i2c1_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */ AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */ >; }; i2c2_pins: pinmux_i2c2_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_clk.i2c2_sda */ AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d0.i2c2_scl */ >; }; spi1_pins: pinmux_spi1_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */ AM33XX_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */ AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */ AM33XX_IOPAD(0x99C, PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */ >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x96C, PIN_OUTPUT | MUX_MODE7) /* uart0_rtsn.gpio1_9 */ AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ >; }; uart1_pins: pinmux_uart1_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ >; }; uart3_pins: pinmux_uart3_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE1) /* spi0_cs1.uart3_rxd */ AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */ >; }; clkout2_pin: pinmux_clkout2_pin { pinctrl-single,pins = < AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ >; }; cpsw_default: cpsw_default { pinctrl-single,pins = < /* Port 1 (emac0) */ AM33XX_IOPAD(0x908, PIN_INPUT | MUX_MODE0) /* mii1_col.mii1_col */ AM33XX_IOPAD(0x90C, PIN_INPUT | MUX_MODE0) /* mii1_crs.mii1_crs */ AM33XX_IOPAD(0x910, PIN_INPUT | MUX_MODE0) /* mii1_rxer.mii1_rxer */ AM33XX_IOPAD(0x914, PIN_OUTPUT | MUX_MODE0) /* mii1_txen.mii1_txen */ AM33XX_IOPAD(0x918, PIN_INPUT | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ AM33XX_IOPAD(0x924, PIN_OUTPUT | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ AM33XX_IOPAD(0x92c, PIN_INPUT | MUX_MODE0) /* mii1_txclk.mii1_txclk */ AM33XX_IOPAD(0x930, PIN_INPUT | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ AM33XX_IOPAD(0x934, PIN_INPUT | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ AM33XX_IOPAD(0x938, PIN_INPUT | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ AM33XX_IOPAD(0x93c, PIN_INPUT | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ /* Port 2 (emac1) */ AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1) /* mii2_txen.gpmc_a0 */ AM33XX_IOPAD(0x844, PIN_INPUT | MUX_MODE1) /* mii2_rxdv.gpmc_a1 */ AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1) /* mii2_txd3.gpmc_a2 */ AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1) /* mii2_txd2.gpmc_a3 */ AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1) /* mii2_txd1.gpmc_a4 */ AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1) /* mii2_txd0.gpmc_a5 */ AM33XX_IOPAD(0x858, PIN_INPUT | MUX_MODE1) /* mii2_txclk.gpmc_a6 */ AM33XX_IOPAD(0x85c, PIN_INPUT | MUX_MODE1) /* mii2_rxclk.gpmc_a7 */ AM33XX_IOPAD(0x860, PIN_INPUT | MUX_MODE1) /* mii2_rxd3.gpmc_a8 */ AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE1) /* mii2_rxd2.gpmc_a9 */ AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE1) /* mii2_rxd1.gpmc_a10 */ AM33XX_IOPAD(0x86C, PIN_INPUT | MUX_MODE1) /* mii2_rxd0.gpmc_a11 */ AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE1) /* mii2_crs.gpmc_wait0 */ AM33XX_IOPAD(0x874, PIN_INPUT | MUX_MODE1) /* mii2_rxer.gpmc_wpn */ AM33XX_IOPAD(0x878, PIN_INPUT | MUX_MODE1) /* mii2_col.gpmc_ben1 */ >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ >; }; mmc1_pins: pinmux_mmc1_pins { /* eMMC */ pinctrl-single,pins = < AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */ AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */ AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */ AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */ AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */ AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */ >; }; mmc2_pins: pinmux_mmc2_pins { /* SD cardcage */ pinctrl-single,pins = < AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ /* card change signal for frontpanel SD cardcage */ AM33XX_IOPAD(0x890, PIN_INPUT | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ >; }; lcd_pins_s0: lcd_pins_s0 { pinctrl-single,pins = < AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */ AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */ AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */ AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */ AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */ AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */ AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */ AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */ AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */ AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */ AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */ AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */ AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */ AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */ AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */ AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */ AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */ AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */ AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */ AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */ >; }; dcan0_pins: pinmux_dcan0_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2) /* uart1_ctsn.d_can0_tx */ AM33XX_IOPAD(0x97c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart1_rtsn.d_can0_rx */ >; }; }; &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; rts-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; rs485-rts-active-high; rs485-rts-delay = <0 0>; linux,rs485-enabled-at-boot-time; status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; status = "okay"; }; &uart3 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; status = "okay"; }; &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; status = "okay"; clock-frequency = <400000>; tps: tps@2d { reg = <0x2d>; }; m2_eeprom: m2_eeprom@50 { compatible = "atmel,24c256"; reg = <0x50>; status = "okay"; }; }; &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; status = "okay"; clock-frequency = <100000>; board_24aa025e48: board_24aa025e48@50 { compatible = "atmel,24c02"; reg = <0x50>; }; backplane_24aa025e48: backplane_24aa025e48@53 { compatible = "atmel,24c02"; reg = <0x53>; }; pca9532: pca9532@60 { compatible = "nxp,pca9532"; reg = <0x60>; psc0 = <0x97>; pwm0 = <0x80>; psc1 = <0x97>; pwm1 = <0x10>; run.red@0 { type = ; }; run.green@1 { type = ; default-state = "on"; }; s2.red@2 { type = ; }; s2.green@3 { type = ; }; s1.yellow@4 { type = ; }; s1.green@5 { type = ; }; }; pca9530: pca9530@61 { compatible = "nxp,pca9530"; reg = <0x61>; tft-panel@0 { type = ; linux,default-trigger = "backlight"; default-state = "on"; }; }; mcp79400: mcp79400@6f { compatible = "microchip,mcp7940x"; reg = <0x6f>; }; }; &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins>; status = "okay"; clock-frequency = <100000>; }; &spi1 { pinctrl-names = "default"; pinctrl-0 = <&spi1_pins>; ti,pindir-d0-out-d1-in; status = "okay"; cfaf240320a032t { compatible = "orisetech,otm3225a"; reg = <0>; spi-max-frequency = <1000000>; // SPI mode 3 spi-cpol; spi-cpha; status = "okay"; }; }; &usb { status = "okay"; }; &usb_ctrl_mod { status = "okay"; }; &usb0_phy { status = "okay"; }; &usb1_phy { status = "okay"; }; &usb0 { status = "okay"; }; &usb1 { status = "okay"; }; &cppi41dma { status = "okay"; }; /* * Disable soc's rtc as we have no VBAT for it. This makes the board * rtc (Microchip MCP79400) the default rtc device 'rtc0'. */ &rtc { status = "disabled"; }; &lcdc { status = "okay"; }; &elm { status = "okay"; }; #include "tps65910.dtsi" &tps { vcc1-supply = <&vbat>; vcc2-supply = <&vbat>; vcc3-supply = <&vbat>; vcc4-supply = <&vbat>; vcc5-supply = <&vbat>; vcc6-supply = <&vbat>; vcc7-supply = <&vbat>; vccio-supply = <&vbat>; regulators { vrtc_reg: regulator@0 { regulator-name = "ldo_vrtc"; regulator-always-on; }; vio_reg: regulator@1 { regulator-name = "buck_vdd_ddr"; regulator-always-on; }; vdd1_reg: regulator@2 { /* VDD_MPU voltage limits */ regulator-name = "buck_vdd_mpu"; regulator-min-microvolt = <912500>; regulator-max-microvolt = <1312500>; regulator-boot-on; regulator-always-on; }; vdd2_reg: regulator@3 { /* VDD_CORE voltage limits */ regulator-name = "buck_vdd_core"; regulator-min-microvolt = <912500>; regulator-max-microvolt = <1150000>; regulator-boot-on; regulator-always-on; }; vdd3_reg: regulator@4 { regulator-name = "boost_res"; regulator-always-on; }; vdig1_reg: regulator@5 { regulator-name = "ldo_vdig1"; regulator-always-on; }; vdig2_reg: regulator@6 { regulator-name = "ldo_vdig2"; regulator-always-on; }; vpll_reg: regulator@7 { regulator-name = "ldo_vpll"; regulator-always-on; }; vdac_reg: regulator@8 { regulator-name = "ldo_vdac"; regulator-always-on; }; vaux1_reg: regulator@9 { regulator-name = "ldo_vaux1"; regulator-always-on; }; vaux2_reg: regulator@10 { regulator-name = "ldo_vaux2"; regulator-always-on; }; vaux33_reg: regulator@11 { regulator-name = "ldo_vaux33"; regulator-always-on; }; vmmc_reg: regulator@12 { regulator-name = "ldo_vmmc"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vbb_reg: regulator@13 { regulator-name = "bat_vbb"; }; }; }; &mac { pinctrl-names = "default"; pinctrl-0 = <&cpsw_default>; dual_emac; /* no switch, two distinct MACs */ status = "okay"; }; &davinci_mdio { pinctrl-names = "default"; pinctrl-0 = <&davinci_mdio_default>; status = "okay"; }; &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; phy-mode = "mii"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { phy_id = <&davinci_mdio>, <1>; phy-mode = "mii"; dual_emac_res_vlan = <2>; }; &tscadc { status = "okay"; tsc { ti,wires = <4>; ti,x-plate-resistance = <200>; ti,coordinate-readouts = <5>; ti,wire-config = <0x01 0x10 0x22 0x33>; ti,charge-delay = <0x400>; }; adc { ti,adc-channels = <4 5 6 7>; }; }; &mmc1 { status = "okay"; vmmc-supply = <&vmmc_reg>; bus-width = <4>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; non-removable; }; &mmc2 { status = "okay"; vmmc-supply = <&vmmc_reg>; bus-width = <4>; pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>; cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; }; &sham { status = "okay"; }; &aes { status = "okay"; }; &dcan0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&dcan0_pins>; };