// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/ */ /dts-v1/; #include "am33xx.dtsi" #include #include / { model = "Toby Churchill SL50 Series"; compatible = "tcl,am335x-sl50", "ti,am33xx"; cpus { cpu@0 { cpu0-supply = <&dcdc2_reg>; }; }; memory@80000000 { device_type = "memory"; reg = <0x80000000 0x20000000>; /* 512 MB */ }; chosen { stdout-path = &uart0; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&led_pins>; led0 { label = "sl50:red:usr0"; gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; default-state = "off"; }; led1 { label = "sl50:green:usr1"; gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; default-state = "off"; }; led2 { label = "sl50:red:usr2"; gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; default-state = "off"; }; led3 { label = "sl50:green:usr3"; gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; default-state = "off"; }; }; backlight0: disp0 { compatible = "pwm-backlight"; pinctrl-names = "default"; pinctrl-0 = <&backlight0_pins>; pwms = <&ehrpwm1 0 500000 PWM_POLARITY_INVERTED>; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>; default-brightness-level = <50>; enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; power-supply = <&vdd_sys_reg>; }; backlight1: disp1 { compatible = "pwm-backlight"; pinctrl-names = "default"; pinctrl-0 = <&backlight1_pins>; pwms = <&ehrpwm1 1 500000 PWM_POLARITY_INVERTED>; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>; default-brightness-level = <50>; enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>; power-supply = <&vdd_sys_reg>; }; clocks { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>; /* audio external oscillator */ audio_mclk_fixed: oscillator@0 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24576000>; /* 24.576MHz */ }; audio_mclk: audio_mclk_gate@0 { compatible = "gpio-gate-clock"; #clock-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&audio_mclk_pins>; clocks = <&audio_mclk_fixed>; enable-gpios = <&gpio1 27 0>; }; }; panel: lcd_panel { compatible = "ti,tilcdc,panel"; pinctrl-names = "default"; pinctrl-0 = <&lcd_pins>; panel-info { ac-bias = <255>; ac-bias-intrpt = <0>; dma-burst-sz = <16>; bpp = <16>; fdd = <0x80>; tft-alt-mode = <0>; mono-8bit-mode = <0>; sync-edge = <0>; sync-ctrl = <1>; raster-order = <0>; fifo-th = <0>; }; display-timings { native-mode = <&timing0>; timing0: 960x128 { clock-frequency = <18000000>; hactive = <960>; vactive = <272>; hback-porch = <40>; hfront-porch = <16>; hsync-len = <24>; hsync-active = <0>; vback-porch = <3>; vfront-porch = <8>; vsync-len = <4>; vsync-active = <0>; }; }; }; sound { compatible = "audio-graph-card"; label = "sound-card"; pinctrl-names = "default"; pinctrl-0 = <&audio_pa_pins>; widgets = "Headphone", "Headphone Jack", "Speaker", "Speaker External", "Line", "Line In", "Microphone", "Microphone Jack"; routing = "Headphone Jack", "HPLOUT", "Headphone Jack", "HPROUT", "Amplifier", "MONO_LOUT", "Speaker External", "Amplifier", "LINE1R", "Line In", "LINE1L", "Line In", "MIC3L", "Microphone Jack", "MIC3R", "Microphone Jack", "Microphone Jack", "Mic Bias"; dais = <&cpu_port>; pa-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; }; emmc_pwrseq: pwrseq@0 { compatible = "mmc-pwrseq-emmc"; pinctrl-names = "default"; pinctrl-0 = <&emmc_pwrseq_pins>; reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; }; vdd_sys_reg: regulator@0 { compatible = "regulator-fixed"; regulator-name = "vdd_sys_reg"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; }; vmmcsd_fixed: fixedregulator0 { compatible = "regulator-fixed"; regulator-name = "vmmcsd_fixed"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; }; &am33xx_pinmux { pinctrl-names = "default"; pinctrl-0 = <&lwb_pins>; audio_pins: pinmux_audio_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) >; }; audio_pa_pins: pinmux_audio_pa_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLDOWN, MUX_MODE7) /* SoundPA_en - mcasp0_aclkr.gpio3_18 */ >; }; audio_mclk_pins: pinmux_audio_mclk_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.gpio1_27 */ >; }; backlight0_pins: pinmux_backlight0_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE7) /* gpmc_wen.gpio2_4 */ >; }; backlight1_pins: pinmux_backlight1_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad10.gpio0_26 */ >; }; lcd_pins: pinmux_lcd_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) >; }; led_pins: pinmux_led_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* gpmc_a5.gpio1_21 */ AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* gpmc_a6.gpio1_22 */ AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* gpmc_a7.gpio1_23 */ AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* gpmc_a8.gpio1_24 */ >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) >; }; uart1_pins: pinmux_uart1_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) >; }; uart4_pins: pinmux_uart4_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* gpmc_wait0.uart4_rxd */ AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* gpmc_wpn.uart4_txd */ >; }; i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) >; }; i2c2_pins: pinmux_i2c2_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */ AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */ >; }; cpsw_default: cpsw_default { pinctrl-single,pins = < /* Slave 1 */ AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0) >; }; cpsw_sleep: cpsw_sleep { pinctrl-single,pins = < /* Slave 1 reset value */ AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < /* MDIO */ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) /* Ethernet */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE7) /* Ethernet_nRST - gpmc_ad14.gpio1_14 */ >; }; davinci_mdio_sleep: davinci_mdio_sleep { pinctrl-single,pins = < /* MDIO reset value */ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) >; }; mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE7) /* uart0_rtsn.gpio1_9 */ >; }; emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a4.gpio1_20 */ >; }; emmc_pins: pinmux_emmc_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ >; }; ehrpwm1_pins: pinmux_ehrpwm1a_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE6) /* gpmc_a2.ehrpwm1a */ AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE6) /* gpmc_a3.ehrpwm1b */ >; }; rtc0_irq_pins: pinmux_rtc0_irq_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_ad9.gpio0_23 */ >; }; spi0_pins: pinmux_spi0_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_MOSI */ AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_MISO */ AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0) AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_CS0 (NBATTSS) */ AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_CS1 (FPGA_FLASH_NCS) */ >; }; lwb_pins: pinmux_lwb_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */ AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLUP, MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */ /* PDI Bus - Battery system */ AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLUP, MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */ /* FPGA */ AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLUP, MUX_MODE7) /* FPGA_DONE - gpmc_ad8.gpio0_22 */ AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLUP, MUX_MODE7) /* FPGA_NRST - gpmc_a0.gpio1_16 */ AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* FPGA_RUN - gpmc_a1.gpio1_17 */ AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLUP, MUX_MODE7) /* ENFPGA - gpmc_a9.gpio1_25 */ AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7) /* FPGA_PROGRAM - gpmc_a10.gpio1_26 */ >; }; }; &i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; clock-frequency = <400000>; tps: tps@24 { reg = <0x24>; }; rtc0: rtc@68 { compatible = "dallas,ds1339"; pinctrl-names = "default"; pinctrl-0 = <&rtc0_irq_pins>; interrupt-parent = <&gpio0>; interrupts = <23 IRQ_TYPE_EDGE_FALLING>; /* gpio 23 */ wakeup-source; trickle-resistor-ohms = <2000>; reg = <0x68>; }; eeprom: eeprom@50 { compatible = "atmel,24c256"; reg = <0x50>; }; gpio_exp: mcp23017@20 { compatible = "microchip,mcp23017"; reg = <0x20>; }; }; &i2c2 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins>; clock-frequency = <400000>; audio_codec: tlv320aic3106@1b { status = "okay"; compatible = "ti,tlv320aic3106"; #sound-dai-cells = <0>; reg = <0x1b>; ai3x-micbias-vg = <2>; /* 2.5V */ AVDD-supply = <&ldo4_reg>; IOVDD-supply = <&ldo4_reg>; DRVDD-supply = <&ldo4_reg>; DVDD-supply = <&ldo3_reg>; codec_port: port { codec_endpoint: endpoint { remote-endpoint = <&cpu_endpoint>; clocks = <&audio_mclk>; }; }; }; /* Ambient Light Sensor */ als: isl29023@44 { compatible = "isil,isl29023"; reg = <0x44>; }; }; &rtc { status = "disabled"; }; &usb0 { dr_mode = "otg"; }; &usb1 { dr_mode = "host"; }; &mmc1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; bus-width = <4>; cd-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; vmmc-supply = <&vmmcsd_fixed>; }; &mmc2 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&emmc_pins>; bus-width = <8>; vmmc-supply = <&vmmcsd_fixed>; mmc-pwrseq = <&emmc_pwrseq>; }; &mcasp0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&audio_pins>; #sound-dai-cells = <0>; op-mode = <0>; /* MCASP_ISS_MODE */ tdm-slots = <2>; /* 4 serializers */ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 0 0 1 2 >; tx-num-evt = <32>; rx-num-evt = <32>; cpu_port: port { cpu_endpoint: endpoint { remote-endpoint = <&codec_endpoint>; dai-format = "dsp_b"; bitclock-master = <&codec_port>; frame-master = <&codec_port>; bitclock-inversion; clocks = <&audio_mclk>; }; }; }; &uart0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; }; &uart1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; }; &uart4 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart4_pins>; }; &spi0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&spi0_pins>; flash: n25q032@1 { #address-cells = <1>; #size-cells = <1>; compatible = "micron,n25q032"; reg = <1>; spi-max-frequency = <5000000>; }; }; #include "tps65217.dtsi" &tps { ti,pmic-shutdown-controller; interrupt-parent = <&intc>; interrupts = <7>; /* NNMI */ regulators { dcdc1_reg: regulator@0 { /* VDDS_DDR */ regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; regulator-always-on; }; dcdc2_reg: regulator@1 { /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ regulator-name = "vdd_mpu"; regulator-min-microvolt = <925000>; regulator-max-microvolt = <1325000>; regulator-boot-on; regulator-always-on; }; dcdc3_reg: regulator@2 { /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ regulator-name = "vdd_core"; regulator-min-microvolt = <925000>; regulator-max-microvolt = <1150000>; regulator-boot-on; regulator-always-on; }; ldo1_reg: regulator@3 { /* VRTC / VIO / VDDS*/ regulator-always-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo2_reg: regulator@4 { /* VDD_3V3AUX */ regulator-always-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; ldo3_reg: regulator@5 { /* VDD_1V8 */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; ldo4_reg: regulator@6 { /* VDD_3V3A */ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; }; }; &cpsw_emac0 { phy-mode = "mii"; phy-handle = <ðphy0>; }; &mac { status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&cpsw_default>; pinctrl-1 = <&cpsw_sleep>; }; &davinci_mdio { status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; reset-delay-us = <100>; /* PHY datasheet states 100us min */ ethphy0: ethernet-phy@0 { reg = <0>; }; }; &sham { status = "okay"; }; &aes { status = "okay"; }; &epwmss1 { status = "okay"; }; &ehrpwm1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&ehrpwm1_pins>; }; &lcdc { status = "okay"; }; &tscadc { status = "okay"; }; &am335x_adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; };