/* * Copyright (C) 2015 Phytec Messtechnik GmbH * Author: Teresa Remmet * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ / { model = "Phytec AM335x phyBOARD-WEGA"; compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx"; sound: sound_iface { compatible = "ti,da830-evm-audio"; }; regulators { compatible = "simple-bus"; vcc3v3: fixedregulator1 { compatible = "regulator-fixed"; regulator-name = "vcc3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; }; }; }; /* Audio */ &am33xx_pinmux { mcasp0_pins: pinmux_mcasp0 { pinctrl-single,pins = < AM33XX_IOPAD(0x9AC, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahclkx.mcasp0_ahclkx */ AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */ AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */ AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */ AM33XX_IOPAD(0x9A8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr1.mcasp0_axr1 */ >; }; }; &i2c0 { tlv320aic3007: tlv320aic3007@18 { compatible = "ti,tlv320aic3007"; reg = <0x18>; AVDD-supply = <&vcc3v3>; IOVDD-supply = <&vcc3v3>; DRVDD-supply = <&vcc3v3>; DVDD-supply = <&vdig1_reg>; status = "okay"; }; }; &mcasp0 { pinctrl-names = "default"; pinctrl-0 = <&mcasp0_pins>; op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */ tdm-slots = <2>; serial-dir = < 2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */ >; tx-num-evt = <16>; rt-num-evt = <16>; status = "okay"; }; &sound { ti,model = "AM335x-Wega"; ti,audio-codec = <&tlv320aic3007>; ti,mcasp-controller = <&mcasp0>; ti,audio-routing = "Line Out", "LLOUT", "Line Out", "RLOUT", "LINE1L", "Line In", "LINE1R", "Line In"; clocks = <&mcasp0_fck>; clock-names = "mclk"; status = "okay"; }; /* CAN Busses */ &am33xx_pinmux { dcan1_pins: pinmux_dcan1 { pinctrl-single,pins = < AM33XX_IOPAD(0x968, PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */ AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */ >; }; }; &dcan1 { pinctrl-names = "default"; pinctrl-0 = <&dcan1_pins>; status = "okay"; }; /* Ethernet */ &am33xx_pinmux { ethernet1_pins: pinmux_ethernet1 { pinctrl-single,pins = < AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1) /* gpmc_a0.mii2_txen */ AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a1.mii2_rxdv */ AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1) /* gpmc_a2.mii2_txd3 */ AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1) /* gpmc_a3.mii2_txd2 */ AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1) /* gpmc_a4.mii2_txd1 */ AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1) /* gpmc_a5.mii2_txd0 */ AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a6.mii2_txclk */ AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a7.mii2_rxclk */ AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a8.mii2_rxd3 */ AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a9.mii2_rxd2 */ AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a10.mii2_rxd1 */ AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a11.mii2_rxd0 */ AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_wpn.mii2_rxerr */ AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_ben1.mii2_col */ >; }; }; &cpsw_emac1 { phy-handle = <&phy1>; phy-mode = "mii"; dual_emac_res_vlan = <2>; }; &davinci_mdio { phy1: ethernet-phy@1 { reg = <1>; }; }; &mac { slaves = <2>; pinctrl-names = "default"; pinctrl-0 = <ðernet0_pins ðernet1_pins>; dual_emac = <1>; }; /* MMC */ &am33xx_pinmux { mmc1_pins: pinmux_mmc1 { pinctrl-single,pins = < AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE7) /* spi0_cs1.mmc0_sdcd */ >; }; }; &mmc1 { vmmc-supply = <&vcc3v3>; bus-width = <4>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; status = "okay"; }; /* Power */ &vdig1_reg { regulator-boot-on; regulator-always-on; }; /* UARTs */ &am33xx_pinmux { uart0_pins: pinmux_uart0 { pinctrl-single,pins = < AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ >; }; uart1_pins: pinmux_uart1_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */ AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */ >; }; }; &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; status = "okay"; }; /* USB */ &cppi41dma { status = "okay"; }; &usb_ctrl_mod { status = "okay"; }; &usb { status = "okay"; }; &usb0 { status = "okay"; }; &usb0_phy { status = "okay"; }; &usb1 { dr_mode = "host"; status = "okay"; }; &usb1_phy { status = "okay"; };