/* * Copyright 2014 Carlo Caione * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This library is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include /include/ "meson.dtsi" / { model = "Amlogic Meson8 SoC"; compatible = "amlogic,meson8"; interrupt-parent = <&gic>; cpus { #address-cells = <1>; #size-cells = <0>; cpu@200 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x200>; }; cpu@201 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x201>; }; cpu@202 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x202>; }; cpu@203 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x203>; }; }; clk81: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <141666666>; }; pinctrl: pinctrl@c1109880 { compatible = "amlogic,meson8-pinctrl"; reg = <0xc1109880 0x10>; #address-cells = <1>; #size-cells = <1>; ranges; gpio: banks@c11080b0 { reg = <0xc11080b0 0x28>, <0xc11080e8 0x18>, <0xc1108120 0x18>, <0xc1108030 0x30>; reg-names = "mux", "pull", "pull-enable", "gpio"; gpio-controller; #gpio-cells = <2>; }; gpio_ao: ao-bank@c1108030 { reg = <0xc8100014 0x4>, <0xc810002c 0x4>, <0xc8100024 0x8>; reg-names = "mux", "pull", "gpio"; gpio-controller; #gpio-cells = <2>; }; uart_ao_a_pins: uart_ao_a { mux { groups = "uart_tx_ao_a", "uart_rx_ao_a"; function = "uart_ao"; }; }; i2c_ao_pins: i2c_mst_ao { mux { groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao"; function = "i2c_mst_ao"; }; }; spi_nor_pins: nor { mux { groups = "nor_d", "nor_q", "nor_c", "nor_cs"; function = "nor"; }; }; ir_recv_pins: remote { mux { groups = "remote_input"; function = "remote"; }; }; eth_pins: ethernet { mux { groups = "eth_tx_clk_50m", "eth_tx_en", "eth_txd1", "eth_txd0", "eth_rx_clk_in", "eth_rx_dv", "eth_rxd1", "eth_rxd0", "eth_mdio", "eth_mdc"; function = "ethernet"; }; }; }; }; /* end of / */