// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ */ /dts-v1/; #include "omap34xx.dtsi" / { model = "TI OMAP3 BeagleBoard"; compatible = "ti,omap3-beagle", "ti,omap3"; cpus { cpu@0 { cpu0-supply = <&vcc>; }; }; memory@80000000 { device_type = "memory"; reg = <0x80000000 0x10000000>; /* 256 MB */ }; aliases { display0 = &dvi0; display1 = &tv0; }; leds { compatible = "gpio-leds"; pmu_stat { label = "beagleboard::pmu_stat"; gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */ }; heartbeat { label = "beagleboard::usr0"; gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */ linux,default-trigger = "heartbeat"; }; mmc { label = "beagleboard::usr1"; gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */ linux,default-trigger = "mmc0"; }; }; /* HS USB Port 2 Power */ hsusb2_power: hsusb2_power_reg { compatible = "regulator-fixed"; regulator-name = "hsusb2_vbus"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */ startup-delay-us = <70000>; }; /* HS USB Host PHY on PORT 2 */ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */ vcc-supply = <&hsusb2_power>; #phy-cells = <0>; }; sound { compatible = "ti,omap-twl4030"; ti,model = "omap3beagle"; ti,mcbsp = <&mcbsp2>; }; gpio_keys { compatible = "gpio-keys"; user { label = "user"; gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; linux,code = <0x114>; wakeup-source; }; }; tfp410: encoder0 { compatible = "ti,tfp410"; powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */ pinctrl-names = "default"; pinctrl-0 = <&tfp410_pins>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tfp410_in: endpoint { remote-endpoint = <&dpi_out>; }; }; port@1 { reg = <1>; tfp410_out: endpoint { remote-endpoint = <&dvi_connector_in>; }; }; }; }; dvi0: connector0 { compatible = "dvi-connector"; label = "dvi"; digital; ddc-i2c-bus = <&i2c3>; port { dvi_connector_in: endpoint { remote-endpoint = <&tfp410_out>; }; }; }; tv0: connector1 { compatible = "svideo-connector"; label = "tv"; port { tv_connector_in: endpoint { remote-endpoint = <&venc_out>; }; }; }; etb@540000000 { compatible = "arm,coresight-etb10", "arm,primecell"; reg = <0x5401b000 0x1000>; clocks = <&emu_src_ck>; clock-names = "apb_pclk"; in-ports { port { etb_in: endpoint { remote-endpoint = <&etm_out>; }; }; }; }; etm@54010000 { compatible = "arm,coresight-etm3x", "arm,primecell"; reg = <0x54010000 0x1000>; clocks = <&emu_src_ck>; clock-names = "apb_pclk"; out-ports { port { etm_out: endpoint { remote-endpoint = <&etb_in>; }; }; }; }; }; &omap3_pmx_wkup { gpio1_pins: pinmux_gpio1_pins { pinctrl-single,pins = < OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */ >; }; }; &omap3_pmx_core { pinctrl-names = "default"; pinctrl-0 = < &hsusb2_pins >; hsusb2_pins: pinmux_hsusb2_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ >; }; uart3_pins: pinmux_uart3_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ >; }; tfp410_pins: pinmux_tfp410_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ >; }; dss_dpi_pins: pinmux_dss_dpi_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ >; }; }; &omap3_pmx_core2 { pinctrl-names = "default"; pinctrl-0 = < &hsusb2_2_pins >; hsusb2_2_pins: pinmux_hsusb2_2_pins { pinctrl-single,pins = < OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ >; }; }; &i2c1 { clock-frequency = <2600000>; twl: twl@48 { reg = <0x48>; interrupts = <7>; /* SYS_NIRQ cascaded to intc */ interrupt-parent = <&intc>; twl_audio: audio { compatible = "ti,twl4030-audio"; codec { }; }; }; }; #include "twl4030.dtsi" #include "twl4030_omap3.dtsi" &i2c3 { clock-frequency = <100000>; }; &mmc1 { vmmc-supply = <&vmmc1>; vqmmc-supply = <&vsim>; bus-width = <8>; }; &mmc2 { status = "disabled"; }; &mmc3 { status = "disabled"; }; &usbhshost { port2-mode = "ehci-phy"; }; &usbhsehci { phys = <0 &hsusb2_phy>; }; &twl_gpio { ti,use-leds; /* pullups: BIT(1) */ ti,pullups = <0x000002>; /* * pulldowns: * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13) * BIT(15), BIT(16), BIT(17) */ ti,pulldowns = <0x03a1c4>; }; &uart3 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>; }; &gpio1 { pinctrl-names = "default"; pinctrl-0 = <&gpio1_pins>; }; &usb_otg_hs { interface-type = <0>; usb-phy = <&usb2_phy>; phys = <&usb2_phy>; phy-names = "usb2-phy"; mode = <3>; power = <50>; }; &vaux2 { regulator-name = "vdd_ehci"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; &mcbsp2 { status = "okay"; }; /* Needed to power the DPI pins */ &vpll2 { regulator-always-on; }; &dss { status = "ok"; pinctrl-names = "default"; pinctrl-0 = <&dss_dpi_pins>; port { dpi_out: endpoint { remote-endpoint = <&tfp410_in>; data-lines = <24>; }; }; }; &venc { status = "ok"; vdda-supply = <&vdac>; port { venc_out: endpoint { remote-endpoint = <&tv_connector_in>; ti,channels = <2>; }; }; }; &gpmc { status = "ok"; ranges = <0 0 0x30000000 0x1000000>; /* CS0 space, 16MB */ /* Chip select 0 */ nand@0,0 { compatible = "ti,omap2-nand"; reg = <0 0 4>; /* NAND I/O window, 4 bytes */ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ ti,nand-ecc-opt = "ham1"; rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ nand-bus-width = <16>; #address-cells = <1>; #size-cells = <1>; gpmc,device-width = <2>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <36>; gpmc,cs-wr-off-ns = <36>; gpmc,adv-on-ns = <6>; gpmc,adv-rd-off-ns = <24>; gpmc,adv-wr-off-ns = <36>; gpmc,oe-on-ns = <6>; gpmc,oe-off-ns = <48>; gpmc,we-on-ns = <6>; gpmc,we-off-ns = <30>; gpmc,rd-cycle-ns = <72>; gpmc,wr-cycle-ns = <72>; gpmc,access-ns = <54>; gpmc,wr-access-ns = <30>; partition@0 { label = "X-Loader"; reg = <0 0x80000>; }; partition@80000 { label = "U-Boot"; reg = <0x80000 0x1e0000>; }; partition@1c0000 { label = "U-Boot Env"; reg = <0x260000 0x20000>; }; partition@280000 { label = "Kernel"; reg = <0x280000 0x400000>; }; partition@780000 { label = "Filesystem"; reg = <0x680000 0xf980000>; }; }; };