// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for the RZ/A1H RSK board * * Copyright (C) 2016 Renesas Electronics */ /dts-v1/; #include "r7s72100.dtsi" #include #include #include / { model = "RSKRZA1"; compatible = "renesas,rskrza1", "renesas,r7s72100"; aliases { serial0 = &scif2; }; chosen { bootargs = "ignore_loglevel"; stdout-path = "serial0:115200n8"; }; memory@8000000 { device_type = "memory"; reg = <0x08000000 0x02000000>; }; keyboard { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&keyboard_pins>; key-1 { interrupt-parent = <&irqc>; interrupts = <3 IRQ_TYPE_EDGE_BOTH>; linux,code = ; label = "SW1"; wakeup-source; }; key-2 { interrupt-parent = <&irqc>; interrupts = <2 IRQ_TYPE_EDGE_BOTH>; linux,code = ; label = "SW2"; wakeup-source; }; key-3 { interrupt-parent = <&irqc>; interrupts = <5 IRQ_TYPE_EDGE_BOTH>; linux,code = ; label = "SW3"; wakeup-source; }; }; lbsc { #address-cells = <1>; #size-cells = <1>; }; leds { compatible = "gpio-leds"; led0 { gpios = <&port7 1 GPIO_ACTIVE_LOW>; }; led1 { gpios = <&io_expander1 0 GPIO_ACTIVE_LOW>; }; led2 { gpios = <&io_expander1 1 GPIO_ACTIVE_LOW>; }; led3 { gpios = <&io_expander1 2 GPIO_ACTIVE_LOW>; }; }; }; &extal_clk { clock-frequency = <13330000>; }; &i2c3 { pinctrl-names = "default"; pinctrl-0 = <&i2c3_pins>; status = "okay"; clock-frequency = <400000>; io_expander1: gpio@20 { compatible = "onnn,cat9554"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; }; io_expander2: gpio@21 { compatible = "onnn,cat9554"; reg = <0x21>; gpio-controller; #gpio-cells = <2>; }; eeprom@50 { compatible = "renesas,r1ex24016", "atmel,24c16"; reg = <0x50>; pagesize = <16>; }; }; &usb_x1_clk { clock-frequency = <48000000>; }; &rtc_x1_clk { clock-frequency = <32768>; }; &pinctrl { /* RIIC ch3 (Port Expander, EEPROM (MAC Addr), Audio Codec) */ i2c3_pins: i2c3 { pinmux = , /* RIIC3SCL */ ; /* RIIC3SDA */ }; keyboard_pins: keyboard { pinmux = , /* IRQ3 */ , /* IRQ2 */ ; /* IRQ5 */ }; /* Serial Console */ scif2_pins: serial2 { pinmux = , /* TxD2 */ ; /* RxD2 */ }; /* Ethernet */ ether_pins: ether { /* Ethernet on Ports 1,2,3,5 */ pinmux = , /* ET_COL */ , /* ET_MDC */ , /* ET_MDIO */ , /* ET_RXCLK */ , /* ET_RXER */ , /* ET_RXDV */ , /* ET_TXCLK */ , /* ET_TXER */ , /* ET_TXEN */ , /* ET_CRS */ , /* ET_TXD0 */ , /* ET_TXD1 */ , /* ET_TXD2 */ , /* ET_TXD3 */ , /* ET_RXD0 */ , /* ET_RXD1 */ , /* ET_RXD2 */ ; /* ET_RXD3 */ }; /* SDHI ch1 on CN1 */ sdhi1_pins: sdhi1 { pinmux = , /* SD_CD_1 */ , /* SD_WP_1 */ , /* SD_D1_1 */ , /* SD_D0_1 */ , /* SD_CLK_1 */ , /* SD_CMD_1 */ , /* SD_D3_1 */ ; /* SD_D2_1 */ }; }; &mtu2 { status = "okay"; }; ðer { pinctrl-names = "default"; pinctrl-0 = <ðer_pins>; status = "okay"; renesas,no-ether-link; phy-handle = <&phy0>; phy0: ethernet-phy@0 { reg = <0>; }; }; &sdhi1 { pinctrl-names = "default"; pinctrl-0 = <&sdhi1_pins>; bus-width = <4>; status = "okay"; }; &ostm0 { status = "okay"; }; &ostm1 { status = "okay"; }; &rtc { status = "okay"; }; &scif2 { pinctrl-names = "default"; pinctrl-0 = <&scif2_pins>; status = "okay"; };