/* * Device Tree Source for Renesas r8a7778 * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Kuninori Morimoto * * based on r8a7779 * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Simon Horman * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ /include/ "skeleton.dtsi" #include / { compatible = "renesas,r8a7778"; cpus { cpu@0 { compatible = "arm,cortex-a9"; }; }; aliases { spi0 = &hspi0; spi1 = &hspi1; spi2 = &hspi2; }; gic: interrupt-controller@fe438000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0xfe438000 0x1000>, <0xfe430000 0x100>; }; /* irqpin: IRQ0 - IRQ3 */ irqpin: irqpin@fe78001c { compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin"; #interrupt-cells = <2>; interrupt-controller; status = "disabled"; /* default off */ reg = <0xfe78001c 4>, <0xfe780010 4>, <0xfe780024 4>, <0xfe780044 4>, <0xfe780064 4>; interrupt-parent = <&gic>; interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH 0 28 IRQ_TYPE_LEVEL_HIGH 0 29 IRQ_TYPE_LEVEL_HIGH 0 30 IRQ_TYPE_LEVEL_HIGH>; sense-bitfield-width = <2>; }; gpio0: gpio@ffc40000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc40000 0x2c>; interrupt-parent = <&gic>; interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 0 32>; #interrupt-cells = <2>; interrupt-controller; }; gpio1: gpio@ffc41000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc41000 0x2c>; interrupt-parent = <&gic>; interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 32 32>; #interrupt-cells = <2>; interrupt-controller; }; gpio2: gpio@ffc42000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc42000 0x2c>; interrupt-parent = <&gic>; interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 64 32>; #interrupt-cells = <2>; interrupt-controller; }; gpio3: gpio@ffc43000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc43000 0x2c>; interrupt-parent = <&gic>; interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 96 32>; #interrupt-cells = <2>; interrupt-controller; }; gpio4: gpio@ffc44000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc44000 0x2c>; interrupt-parent = <&gic>; interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 128 27>; #interrupt-cells = <2>; interrupt-controller; }; pfc: pfc@fffc0000 { compatible = "renesas,pfc-r8a7778"; reg = <0xfffc0000 0x118>; }; i2c0: i2c@ffc70000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc70000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; i2c1: i2c@ffc71000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc71000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; i2c2: i2c@ffc72000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc72000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; i2c3: i2c@ffc73000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc73000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; mmcif: mmc@ffe4e000 { compatible = "renesas,sh-mmcif"; reg = <0xffe4e000 0x100>; interrupt-parent = <&gic>; interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; sdhi0: sd@ffe4c000 { compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4c000 0x100>; interrupt-parent = <&gic>; interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; }; sdhi1: sd@ffe4d000 { compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4d000 0x100>; interrupt-parent = <&gic>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; }; sdhi2: sd@ffe4f000 { compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4f000 0x100>; interrupt-parent = <&gic>; interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; }; hspi0: spi@fffc7000 { compatible = "renesas,hspi"; reg = <0xfffc7000 0x18>; interrupt-controller = <&gic>; interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; hspi1: spi@fffc8000 { compatible = "renesas,hspi"; reg = <0xfffc8000 0x18>; interrupt-controller = <&gic>; interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; hspi2: spi@fffc6000 { compatible = "renesas,hspi"; reg = <0xfffc6000 0x18>; interrupt-controller = <&gic>; interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; };