/* * Copyright (C) 2014 STMicroelectronics Limited. * Author: Giuseppe Cavallaro * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * publishhed by the Free Software Foundation. */ #include "stih407-pinctrl.dtsi" #include / { #address-cells = <1>; #size-cells = <1>; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; }; }; intc: interrupt-controller@08761000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0x08761000 0x1000>, <0x08760100 0x100>; }; scu@08760000 { compatible = "arm,cortex-a9-scu"; reg = <0x08760000 0x1000>; }; timer@08760200 { interrupt-parent = <&intc>; compatible = "arm,cortex-a9-global-timer"; reg = <0x08760200 0x100>; interrupts = ; clocks = <&arm_periph_clk>; }; l2: cache-controller { compatible = "arm,pl310-cache"; reg = <0x08762000 0x1000>; arm,data-latency = <3 3 3>; arm,tag-latency = <2 2 2>; cache-unified; cache-level = <2>; }; soc { #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&intc>; ranges; compatible = "simple-bus"; powerdown: powerdown-controller { compatible = "st,stih407-powerdown"; #reset-cells = <1>; }; softreset: softreset-controller { compatible = "st,stih407-softreset"; #reset-cells = <1>; }; picophyreset: picophyreset-controller { compatible = "st,stih407-picophyreset"; #reset-cells = <1>; }; syscfg_sbc: sbc-syscfg@9620000 { compatible = "st,stih407-sbc-syscfg", "syscon"; reg = <0x9620000 0x1000>; }; syscfg_front: front-syscfg@9280000 { compatible = "st,stih407-front-syscfg", "syscon"; reg = <0x9280000 0x1000>; }; syscfg_rear: rear-syscfg@9290000 { compatible = "st,stih407-rear-syscfg", "syscon"; reg = <0x9290000 0x1000>; }; syscfg_flash: flash-syscfg@92a0000 { compatible = "st,stih407-flash-syscfg", "syscon"; reg = <0x92a0000 0x1000>; }; syscfg_sbc_reg: fvdp-lite-syscfg@9600000 { compatible = "st,stih407-sbc-reg-syscfg", "syscon"; reg = <0x9600000 0x1000>; }; syscfg_core: core-syscfg@92b0000 { compatible = "st,stih407-core-syscfg", "syscon"; reg = <0x92b0000 0x1000>; }; syscfg_lpm: lpm-syscfg@94b5100 { compatible = "st,stih407-lpm-syscfg", "syscon"; reg = <0x94b5100 0x1000>; }; serial@9830000 { compatible = "st,asc"; reg = <0x9830000 0x2c>; interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_serial0>; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; status = "disabled"; }; serial@9831000 { compatible = "st,asc"; reg = <0x9831000 0x2c>; interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_serial1>; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; status = "disabled"; }; serial@9832000 { compatible = "st,asc"; reg = <0x9832000 0x2c>; interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_serial2>; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; status = "disabled"; }; /* SBC_ASC0 - UART10 */ sbc_serial0: serial@9530000 { compatible = "st,asc"; reg = <0x9530000 0x2c>; interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sbc_serial0>; clocks = <&clk_sysin>; status = "disabled"; }; serial@9531000 { compatible = "st,asc"; reg = <0x9531000 0x2c>; interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sbc_serial1>; clocks = <&clk_sysin>; status = "disabled"; }; i2c@9840000 { compatible = "st,comms-ssc4-i2c"; interrupts = ; reg = <0x9840000 0x110>; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0_default>; status = "disabled"; }; i2c@9841000 { compatible = "st,comms-ssc4-i2c"; reg = <0x9841000 0x110>; interrupts = ; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1_default>; status = "disabled"; }; i2c@9842000 { compatible = "st,comms-ssc4-i2c"; reg = <0x9842000 0x110>; interrupts = ; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2_default>; status = "disabled"; }; i2c@9843000 { compatible = "st,comms-ssc4-i2c"; reg = <0x9843000 0x110>; interrupts = ; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3_default>; status = "disabled"; }; i2c@9844000 { compatible = "st,comms-ssc4-i2c"; reg = <0x9844000 0x110>; interrupts = ; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4_default>; status = "disabled"; }; i2c@9845000 { compatible = "st,comms-ssc4-i2c"; reg = <0x9845000 0x110>; interrupts = ; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c5_default>; status = "disabled"; }; /* SSCs on SBC */ i2c@9540000 { compatible = "st,comms-ssc4-i2c"; reg = <0x9540000 0x110>; interrupts = ; clocks = <&clk_sysin>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c10_default>; status = "disabled"; }; i2c@9541000 { compatible = "st,comms-ssc4-i2c"; reg = <0x9541000 0x110>; interrupts = ; clocks = <&clk_sysin>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c11_default>; status = "disabled"; }; }; };