/* * Copyright 2015 - Maxime Coquelin * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This file is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public * License along with this file; if not, write to the Free * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, * MA 02110-1301 USA * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include "armv7-m.dtsi" / { clocks { clk_sysclk: clk-sysclk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <180000000>; }; clk_hclk: clk-hclk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <180000000>; }; clk_pclk1: clk-pclk1 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <45000000>; }; clk_pclk2: clk-pclk2 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <90000000>; }; clk_pmtr1: clk-pmtr1 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <90000000>; }; clk_pmtr2: clk-pmtr2 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <180000000>; }; clk_systick: clk-systick { compatible = "fixed-factor-clock"; clocks = <&clk_hclk>; #clock-cells = <0>; clock-div = <8>; clock-mult = <1>; }; }; soc { timer2: timer@40000000 { compatible = "st,stm32-timer"; reg = <0x40000000 0x400>; interrupts = <28>; clocks = <&clk_pmtr1>; status = "disabled"; }; timer3: timer@40000400 { compatible = "st,stm32-timer"; reg = <0x40000400 0x400>; interrupts = <29>; clocks = <&clk_pmtr1>; status = "disabled"; }; timer4: timer@40000800 { compatible = "st,stm32-timer"; reg = <0x40000800 0x400>; interrupts = <30>; clocks = <&clk_pmtr1>; status = "disabled"; }; timer5: timer@40000c00 { compatible = "st,stm32-timer"; reg = <0x40000c00 0x400>; interrupts = <50>; clocks = <&clk_pmtr1>; }; timer6: timer@40001000 { compatible = "st,stm32-timer"; reg = <0x40001000 0x400>; interrupts = <54>; clocks = <&clk_pmtr1>; status = "disabled"; }; timer7: timer@40001400 { compatible = "st,stm32-timer"; reg = <0x40001400 0x400>; interrupts = <55>; clocks = <&clk_pmtr1>; status = "disabled"; }; usart2: serial@40004400 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40004400 0x400>; interrupts = <38>; clocks = <&clk_pclk1>; status = "disabled"; }; usart3: serial@40004800 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40004800 0x400>; interrupts = <39>; clocks = <&clk_pclk1>; status = "disabled"; }; usart4: serial@40004c00 { compatible = "st,stm32-uart"; reg = <0x40004c00 0x400>; interrupts = <52>; clocks = <&clk_pclk1>; status = "disabled"; }; usart5: serial@40005000 { compatible = "st,stm32-uart"; reg = <0x40005000 0x400>; interrupts = <53>; clocks = <&clk_pclk1>; status = "disabled"; }; usart7: serial@40007800 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40007800 0x400>; interrupts = <82>; clocks = <&clk_pclk1>; status = "disabled"; }; usart8: serial@40007c00 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40007c00 0x400>; interrupts = <83>; clocks = <&clk_pclk1>; status = "disabled"; }; usart1: serial@40011000 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40011000 0x400>; interrupts = <37>; clocks = <&clk_pclk2>; status = "disabled"; }; usart6: serial@40011400 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40011400 0x400>; interrupts = <71>; clocks = <&clk_pclk2>; status = "disabled"; }; }; }; &systick { clocks = <&clk_systick>; status = "okay"; };