// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2017 - All Rights Reserved * Author: Ludovic Barre for STMicroelectronics. */ #include / { #address-cells = <1>; #size-cells = <1>; cpus { #address-cells = <1>; #size-cells = <0>; cpu0: cpu@0 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; }; cpu1: cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; }; }; psci { compatible = "arm,psci"; method = "smc"; cpu_off = <0x84000002>; cpu_on = <0x84000003>; }; aliases { gpio0 = &gpioa; gpio1 = &gpiob; gpio2 = &gpioc; gpio3 = &gpiod; gpio4 = &gpioe; gpio5 = &gpiof; gpio6 = &gpiog; gpio7 = &gpioh; gpio8 = &gpioi; gpio9 = &gpioj; gpio10 = &gpiok; }; intc: interrupt-controller@a0021000 { compatible = "arm,cortex-a7-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0xa0021000 0x1000>, <0xa0022000 0x2000>; }; timer { compatible = "arm,armv7-timer"; interrupts = , , , ; interrupt-parent = <&intc>; }; clocks { clk_hse: clk-hse { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; }; clk_pll_per: clk-pll-per { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <64000000>; }; clk_hsi: clk-hsi { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <64000000>; }; clk_lse: clk-lse { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; }; clk_lsi: clk-lsi { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32000>; }; clk_csi: clk-csi { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <4000000>; }; clk_pclk1: clk-pclk1 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <86000000>; }; clk_pll3_p: clk-pll3_p { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <172000000>; }; clk_pll2_p: clk-pll2_p { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <264000000>; }; }; soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&intc>; ranges; usart2: serial@4000e000 { compatible = "st,stm32h7-uart"; reg = <0x4000e000 0x400>; interrupts = ; clocks = <&clk_pclk1>; status = "disabled"; }; usart3: serial@4000f000 { compatible = "st,stm32h7-uart"; reg = <0x4000f000 0x400>; interrupts = ; clocks = <&clk_pclk1>; status = "disabled"; }; uart4: serial@40010000 { compatible = "st,stm32h7-uart"; reg = <0x40010000 0x400>; interrupts = ; clocks = <&clk_pclk1>; status = "disabled"; }; uart5: serial@40011000 { compatible = "st,stm32h7-uart"; reg = <0x40011000 0x400>; interrupts = ; clocks = <&clk_pclk1>; status = "disabled"; }; uart7: serial@40018000 { compatible = "st,stm32h7-uart"; reg = <0x40018000 0x400>; interrupts = ; clocks = <&clk_pclk1>; status = "disabled"; }; uart8: serial@40019000 { compatible = "st,stm32h7-uart"; reg = <0x40019000 0x400>; interrupts = ; clocks = <&clk_pclk1>; status = "disabled"; }; usart6: serial@44003000 { compatible = "st,stm32h7-uart"; reg = <0x44003000 0x400>; interrupts = ; clocks = <&clk_pclk1>; status = "disabled"; }; usart1: serial@5c000000 { compatible = "st,stm32h7-uart"; reg = <0x5c000000 0x400>; interrupts = ; clocks = <&clk_pclk1>; status = "disabled"; }; }; };