/dts-v1/; /include/ "skeleton.dtsi" / { model = "ARM Versatile AB"; compatible = "arm,versatile-ab"; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&vic>; aliases { serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; i2c0 = &i2c0; }; memory { reg = <0x0 0x08000000>; }; flash@34000000 { compatible = "arm,versatile-flash"; reg = <0x34000000 0x4000000>; bank-width = <4>; }; i2c0: i2c@10002000 { #address-cells = <1>; #size-cells = <0>; compatible = "arm,versatile-i2c"; reg = <0x10002000 0x1000>; rtc@68 { compatible = "dallas,ds1338"; reg = <0x68>; }; }; net@10010000 { compatible = "smsc,lan91c111"; reg = <0x10010000 0x10000>; interrupts = <25>; }; lcd@10008000 { compatible = "arm,versatile-lcd"; reg = <0x10008000 0x1000>; }; amba { compatible = "arm,amba-bus"; #address-cells = <1>; #size-cells = <1>; ranges; vic: intc@10140000 { compatible = "arm,versatile-vic"; interrupt-controller; #interrupt-cells = <1>; reg = <0x10140000 0x1000>; }; sic: intc@10003000 { compatible = "arm,versatile-sic"; interrupt-controller; #interrupt-cells = <1>; reg = <0x10003000 0x1000>; interrupt-parent = <&vic>; interrupts = <31>; /* Cascaded to vic */ }; dma@10130000 { compatible = "arm,pl081", "arm,primecell"; reg = <0x10130000 0x1000>; interrupts = <17>; }; uart0: uart@101f1000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f1000 0x1000>; interrupts = <12>; }; uart1: uart@101f2000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f2000 0x1000>; interrupts = <13>; }; uart2: uart@101f3000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f3000 0x1000>; interrupts = <14>; }; smc@10100000 { compatible = "arm,primecell"; reg = <0x10100000 0x1000>; }; mpmc@10110000 { compatible = "arm,primecell"; reg = <0x10110000 0x1000>; }; display@10120000 { compatible = "arm,pl110", "arm,primecell"; reg = <0x10120000 0x1000>; interrupts = <16>; }; sctl@101e0000 { compatible = "arm,primecell"; reg = <0x101e0000 0x1000>; }; watchdog@101e1000 { compatible = "arm,primecell"; reg = <0x101e1000 0x1000>; interrupts = <0>; }; timer@101e2000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x101e2000 0x1000>; interrupts = <4>; }; timer@101e3000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x101e3000 0x1000>; interrupts = <5>; }; gpio0: gpio@101e4000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x101e4000 0x1000>; gpio-controller; interrupts = <6>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; gpio1: gpio@101e5000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x101e5000 0x1000>; interrupts = <7>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; rtc@101e8000 { compatible = "arm,pl030", "arm,primecell"; reg = <0x101e8000 0x1000>; interrupts = <10>; }; sci@101f0000 { compatible = "arm,primecell"; reg = <0x101f0000 0x1000>; interrupts = <15>; }; ssp@101f4000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x101f4000 0x1000>; interrupts = <11>; }; fpga { compatible = "arm,versatile-fpga", "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x10000000 0x10000>; aaci@4000 { compatible = "arm,primecell"; reg = <0x4000 0x1000>; interrupts = <24>; }; mmc@5000 { compatible = "arm,primecell"; reg = < 0x5000 0x1000>; interrupts-extended = <&vic 22 &sic 2>; }; kmi@6000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x6000 0x1000>; interrupt-parent = <&sic>; interrupts = <3>; }; kmi@7000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x7000 0x1000>; interrupt-parent = <&sic>; interrupts = <4>; }; }; }; };