/* * Device Tree Include file for Freescale Layerscape-1043A family SoC. * * Copyright 2014-2015, Freescale Semiconductor * * Mingkai Hu * * This file is dual-licensed: you can use it either under the terms * of the GPLv2 or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This library is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; #include "fsl-ls1043a.dtsi" / { model = "LS1043A RDB Board"; aliases { crypto = &crypto; serial0 = &duart0; serial1 = &duart1; serial2 = &duart2; serial3 = &duart3; }; chosen { stdout-path = "serial0:115200n8"; }; }; &i2c0 { status = "okay"; ina220@40 { compatible = "ti,ina220"; reg = <0x40>; shunt-resistor = <1000>; }; adt7461a@4c { compatible = "adi,adt7461"; reg = <0x4c>; }; eeprom@52 { compatible = "at24,24c512"; reg = <0x52>; }; eeprom@53 { compatible = "at24,24c512"; reg = <0x53>; }; rtc@68 { compatible = "pericom,pt7c4338"; reg = <0x68>; }; }; &ifc { status = "okay"; #address-cells = <2>; #size-cells = <1>; /* NOR, NAND Flashes and FPGA on board */ ranges = <0x0 0x0 0x0 0x60000000 0x08000000 0x1 0x0 0x0 0x7e800000 0x00010000 0x2 0x0 0x0 0x7fb00000 0x00000100>; nor@0,0 { compatible = "cfi-flash"; #address-cells = <1>; #size-cells = <1>; reg = <0x0 0x0 0x8000000>; bank-width = <2>; device-width = <1>; }; nand@1,0 { compatible = "fsl,ifc-nand"; #address-cells = <1>; #size-cells = <1>; reg = <0x1 0x0 0x10000>; }; cpld: board-control@2,0 { compatible = "fsl,ls1043ardb-cpld"; reg = <0x2 0x0 0x0000100>; }; }; &dspi0 { bus-num = <0>; status = "okay"; flash@0 { #address-cells = <1>; #size-cells = <1>; compatible = "n25q128a13", "jedec,spi-nor"; /* 16MB */ reg = <0>; spi-max-frequency = <1000000>; /* input clock */ }; }; &duart0 { status = "okay"; }; &duart1 { status = "okay"; };