// SPDX-License-Identifier: GPL-2.0 /* * dts file for MediaTek MT6380 regulator * * Copyright (c) 2018 MediaTek Inc. * Author: Chenglin Xu * Sean Wang */ &pwrap { regulators { compatible = "mediatek,mt6380-regulator"; mt6380_vcpu_reg: buck-vcore1 { regulator-name = "vcore1"; regulator-min-microvolt = < 600000>; regulator-max-microvolt = <1393750>; regulator-ramp-delay = <6250>; regulator-always-on; regulator-boot-on; }; mt6380_vcore_reg: buck-vcore { regulator-name = "vcore"; regulator-min-microvolt = <600000>; regulator-max-microvolt = <1393750>; regulator-ramp-delay = <6250>; regulator-always-on; regulator-boot-on; }; mt6380_vrf_reg: buck-vrf { regulator-name = "vrf"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1575000>; regulator-ramp-delay = <0>; regulator-always-on; regulator-boot-on; }; mt6380_vm_reg: ldo-vm { regulator-name = "vm"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1400000>; regulator-ramp-delay = <0>; regulator-always-on; regulator-boot-on; }; mt6380_va_reg: ldo-va { regulator-name = "va"; regulator-min-microvolt = <2200000>; regulator-max-microvolt = <3300000>; regulator-ramp-delay = <0>; regulator-always-on; regulator-boot-on; }; mt6380_vphy_reg: ldo-vphy { regulator-name = "vphy"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-ramp-delay = <0>; regulator-always-on; regulator-boot-on; }; mt6380_vddr_reg: ldo-vddr { regulator-name = "vddr"; regulator-min-microvolt = <1240000>; regulator-max-microvolt = <1840000>; regulator-ramp-delay = <0>; regulator-always-on; regulator-boot-on; }; mt6380_vt_reg: ldo-vt { regulator-name = "vt"; regulator-min-microvolt = <2200000>; regulator-max-microvolt = <3300000>; regulator-ramp-delay = <0>; regulator-always-on; regulator-boot-on; }; }; };