// SPDX-License-Identifier: GPL-2.0-only
/*
 * Unisoc Sharkl3 platform DTS file
 *
 * Copyright (C) 2019, Unisoc Inc.
 */

/ {
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	soc: soc {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		apb@70000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x0 0x70000000 0x10000000>;

			uart0: serial@0 {
				compatible = "sprd,sc9863a-uart",
					     "sprd,sc9836-uart";
				reg = <0x0 0x100>;
				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&ext_26m>;
				status = "disabled";
			};

			uart1: serial@100000 {
				compatible = "sprd,sc9863a-uart",
					     "sprd,sc9836-uart";
				reg = <0x100000 0x100>;
				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&ext_26m>;
				status = "disabled";
			};

			uart2: serial@200000 {
				compatible = "sprd,sc9863a-uart",
					     "sprd,sc9836-uart";
				reg = <0x200000 0x100>;
				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&ext_26m>;
				status = "disabled";
			};

			uart3: serial@300000 {
				compatible = "sprd,sc9863a-uart",
					     "sprd,sc9836-uart";
				reg = <0x300000 0x100>;
				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&ext_26m>;
				status = "disabled";
			};

			uart4: serial@400000 {
				compatible = "sprd,sc9863a-uart",
					     "sprd,sc9836-uart";
				reg = <0x400000 0x100>;
				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&ext_26m>;
				status = "disabled";
			};
		};
	};

	ext_26m: ext-26m {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <26000000>;
		clock-output-names = "ext-26m";
	};
};