// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; #include "k3-j7200.dtsi" / { memory@80000000 { device_type = "memory"; /* 4G RAM */ reg = <0x00 0x80000000 0x00 0x80000000>, <0x08 0x80000000 0x00 0x80000000>; }; reserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; secure_ddr: optee@9e800000 { reg = <0x00 0x9e800000 0x00 0x01800000>; alignment = <0x1000>; no-map; }; }; }; &wkup_pmx0 { mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (B6) MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */ J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* (C8) MCU_OSPI0_LBCLKO.MCU_HYPERBUS0_CKn */ J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* (D6) MCU_OSPI0_CSn0.MCU_HYPERBUS0_CSn0 */ J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* (D7) MCU_OSPI0_CSn1.MCU_HYPERBUS0_RESETn */ J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1) /* (B7) MCU_OSPI0_DQS.MCU_HYPERBUS0_RWDS */ J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1) /* (D8) MCU_OSPI0_D0.MCU_HYPERBUS0_DQ0 */ J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1) /* (C7) MCU_OSPI0_D1.MCU_HYPERBUS0_DQ1 */ J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1) /* (C5) MCU_OSPI0_D2.MCU_HYPERBUS0_DQ2 */ J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* (A5) MCU_OSPI0_D3.MCU_HYPERBUS0_DQ3 */ J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1) /* (A6) MCU_OSPI0_D4.MCU_HYPERBUS0_DQ4 */ J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (B8) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */ J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (A8) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */ J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */ >; }; }; &main_pmx0 { main_i2c0_pins_default: main-i2c0-pins-default { pinctrl-single,pins = < J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ >; }; }; &hbmc { /* OSPI and HBMC are muxed inside FSS, Bootloader will enable * appropriate node based on board detection */ status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_hpb0_pins_default>; ranges = <0x00 0x00 0x05 0x00000000 0x4000000>, /* 64MB Flash on CS0 */ <0x01 0x00 0x05 0x04000000 0x800000>; /* 8MB RAM on CS1 */ flash@0,0 { compatible = "cypress,hyperflash", "cfi-flash"; reg = <0x00 0x00 0x4000000>; }; }; &mailbox0_cluster0 { interrupts = <436>; mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster1 { interrupts = <432>; mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster2 { status = "disabled"; }; &mailbox0_cluster3 { status = "disabled"; }; &mailbox0_cluster4 { status = "disabled"; }; &mailbox0_cluster5 { status = "disabled"; }; &mailbox0_cluster6 { status = "disabled"; }; &mailbox0_cluster7 { status = "disabled"; }; &mailbox0_cluster8 { status = "disabled"; }; &mailbox0_cluster9 { status = "disabled"; }; &mailbox0_cluster10 { status = "disabled"; }; &mailbox0_cluster11 { status = "disabled"; }; &main_i2c0 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; exp_som: gpio@21 { compatible = "ti,tca6408"; reg = <0x21>; gpio-controller; #gpio-cells = <2>; gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0", "CANUART_MUX2_SEL0", "CANUART_MUX_SEL1", "UART/LIN_MUX_SEL", "TRC_D17/AUDIO_REFCLK_SEL", "GPIO_LIN_EN", "CAN_STB"; }; };