/ { #address-cells = <1>; #size-cells = <1>; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; model = "ti,c64x+"; reg = <0>; }; }; soc { compatible = "simple-bus"; model = "tms320c6457"; #address-cells = <1>; #size-cells = <1>; ranges; core_pic: interrupt-controller { interrupt-controller; #interrupt-cells = <1>; compatible = "ti,c64x+core-pic"; }; megamod_pic: interrupt-controller@1800000 { compatible = "ti,c64x+megamod-pic"; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&core_pic>; reg = <0x1800000 0x1000>; }; cache-controller@1840000 { compatible = "ti,c64x+cache"; reg = <0x01840000 0x8400>; }; device-state-controller@2880800 { compatible = "ti,c64x+dscr"; reg = <0x02880800 0x400>; ti,dscr-devstat = <0x20>; ti,dscr-silicon-rev = <0x18 28 0xf>; ti,dscr-mac-fuse-regs = <0x114 3 4 5 6 0x118 0 0 1 2>; ti,dscr-kick-regs = <0x38 0x83E70B13 0x3c 0x95A4F1E0>; }; timer0: timer@2940000 { compatible = "ti,c64x+timer64"; reg = <0x2940000 0x40>; }; clock-controller@29a0000 { compatible = "ti,c6457-pll", "ti,c64x+pll"; reg = <0x029a0000 0x200>; ti,c64x+pll-bypass-delay = <300>; ti,c64x+pll-reset-delay = <24000>; ti,c64x+pll-lock-delay = <50000>; }; }; };