// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* Copyright (c) 2020 Microsemi Corporation */ / { #address-cells = <1>; #size-cells = <1>; compatible = "mscc,luton"; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { compatible = "mips,mips24KEc"; device_type = "cpu"; clocks = <&cpu_clk>; reg = <0>; }; }; aliases { serial0 = &uart0; }; cpuintc: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; compatible = "mti,cpu-interrupt-controller"; }; cpu_clk: cpu-clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <416666666>; }; ahb_clk: ahb-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; clocks = <&cpu_clk>; clock-div = <2>; clock-mult = <1>; }; ahb@60000000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x60000000 0x20000000>; interrupt-parent = <&intc>; cpu_ctrl: syscon@10000000 { compatible = "mscc,ocelot-cpu-syscon", "syscon"; reg = <0x10000000 0x2c>; }; intc: interrupt-controller@10000084 { compatible = "mscc,luton-icpu-intr"; reg = <0x10000084 0x70>; #interrupt-cells = <1>; interrupt-controller; interrupt-parent = <&cpuintc>; interrupts = <2>; }; uart0: serial@10100000 { pinctrl-0 = <&uart_pins>; pinctrl-names = "default"; compatible = "ns16550a"; reg = <0x10100000 0x20>; interrupts = <6>; clocks = <&ahb_clk>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; }; i2c0: i2c@10100400 { compatible = "mscc,ocelot-i2c", "snps,designware-i2c"; pinctrl-0 = <&i2c_pins>; pinctrl-names = "default"; reg = <0x10100400 0x100>, <0x100002a4 0x8>; #address-cells = <1>; #size-cells = <0>; interrupts = <11>; clocks = <&ahb_clk>; status = "disabled"; }; gpio: pinctrl@70068 { compatible = "mscc,luton-pinctrl"; reg = <0x70068 0x28>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&gpio 0 0 32>; interrupt-controller; interrupts = <13>; #interrupt-cells = <2>; i2c_pins: i2c-pins { pins = "GPIO_5", "GPIO_6"; function = "twi"; }; uart_pins: uart-pins { pins = "GPIO_30", "GPIO_31"; function = "uart"; }; }; }; };