/* * T1040RDB Device Tree Source * * Copyright 2014 - 2015 Freescale Semiconductor Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of Freescale Semiconductor nor the * names of its contributors may be used to endorse or promote products * derived from this software without specific prior written permission. * * * ALTERNATIVELY, this software may be distributed under the terms of the * GNU General Public License ("GPL") as published by the Free Software * Foundation, either version 2 of that License or (at your option) any * later version. * * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /include/ "t104xsi-pre.dtsi" /include/ "t104xrdb.dtsi" / { model = "fsl,T1040RDB"; compatible = "fsl,T1040RDB"; aliases { phy_sgmii_2 = &phy_sgmii_2; }; soc@ffe000000 { fman@400000 { ethernet@e0000 { fixed-link = <0 1 1000 0 0>; phy-connection-type = "sgmii"; }; ethernet@e2000 { fixed-link = <1 1 1000 0 0>; phy-connection-type = "sgmii"; }; ethernet@e4000 { phy-handle = <&phy_sgmii_2>; phy-connection-type = "sgmii"; }; mdio@fc000 { phy_sgmii_2: ethernet-phy@3 { reg = <0x03>; }; /* VSC8514 QSGMII PHY */ phy_qsgmii_0: ethernet-phy@4 { reg = <0x4>; }; phy_qsgmii_1: ethernet-phy@5 { reg = <0x5>; }; phy_qsgmii_2: ethernet-phy@6 { reg = <0x6>; }; phy_qsgmii_3: ethernet-phy@7 { reg = <0x7>; }; /* VSC8514 QSGMII PHY */ phy_qsgmii_4: ethernet-phy@8 { reg = <0x8>; }; phy_qsgmii_5: ethernet-phy@9 { reg = <0x9>; }; phy_qsgmii_6: ethernet-phy@a { reg = <0xa>; }; phy_qsgmii_7: ethernet-phy@b { reg = <0xb>; }; }; }; }; ifc: localbus@ffe124000 { cpld@3,0 { compatible = "fsl,t1040rdb-cpld"; }; }; }; #include "t1040si-post.dtsi" &seville_switch { status = "okay"; }; &seville_port0 { managed = "in-band-status"; phy-handle = <&phy_qsgmii_0>; phy-mode = "qsgmii"; label = "ETH5"; status = "okay"; }; &seville_port1 { managed = "in-band-status"; phy-handle = <&phy_qsgmii_1>; phy-mode = "qsgmii"; label = "ETH4"; status = "okay"; }; &seville_port2 { managed = "in-band-status"; phy-handle = <&phy_qsgmii_2>; phy-mode = "qsgmii"; label = "ETH7"; status = "okay"; }; &seville_port3 { managed = "in-band-status"; phy-handle = <&phy_qsgmii_3>; phy-mode = "qsgmii"; label = "ETH6"; status = "okay"; }; &seville_port4 { managed = "in-band-status"; phy-handle = <&phy_qsgmii_4>; phy-mode = "qsgmii"; label = "ETH9"; status = "okay"; }; &seville_port5 { managed = "in-band-status"; phy-handle = <&phy_qsgmii_5>; phy-mode = "qsgmii"; label = "ETH8"; status = "okay"; }; &seville_port6 { managed = "in-band-status"; phy-handle = <&phy_qsgmii_6>; phy-mode = "qsgmii"; label = "ETH11"; status = "okay"; }; &seville_port7 { managed = "in-band-status"; phy-handle = <&phy_qsgmii_7>; phy-mode = "qsgmii"; label = "ETH10"; status = "okay"; }; &seville_port8 { ethernet = <&enet0>; status = "okay"; };