/* * Device Tree Source for Motorola/Emerson MVME5100. * * Copyright 2013 CSC Australia Pty. Ltd. * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without * any warranty of any kind, whether express or implied. */ /dts-v1/; / { model = "MVME5100"; compatible = "MVME5100"; #address-cells = <1>; #size-cells = <1>; aliases { serial0 = &serial0; pci0 = &pci0; }; cpus { #address-cells = <1>; #size-cells = <0>; PowerPC,7410 { device_type = "cpu"; reg = <0x0>; /* Following required by dtc but not used */ d-cache-line-size = <32>; i-cache-line-size = <32>; i-cache-size = <32768>; d-cache-size = <32768>; timebase-frequency = <25000000>; clock-frequency = <500000000>; bus-frequency = <100000000>; }; }; memory { device_type = "memory"; reg = <0x0 0x20000000>; }; hawk@fef80000 { #address-cells = <1>; #size-cells = <1>; compatible = "hawk-bridge", "simple-bus"; ranges = <0x0 0xfef80000 0x10000>; reg = <0xfef80000 0x10000>; serial0: serial@8000 { device_type = "serial"; compatible = "ns16550"; reg = <0x8000 0x80>; reg-shift = <4>; clock-frequency = <1843200>; current-speed = <9600>; interrupts = <1 1>; // IRQ1 Level Active Low. interrupt-parent = <&mpic>; }; serial1: serial@8200 { device_type = "serial"; compatible = "ns16550"; reg = <0x8200 0x80>; reg-shift = <4>; clock-frequency = <1843200>; current-speed = <9600>; interrupts = <1 1>; // IRQ1 Level Active Low. interrupt-parent = <&mpic>; }; mpic: interrupt-controller@f3f80000 { #interrupt-cells = <2>; #address-cells = <0>; device_type = "open-pic"; compatible = "chrp,open-pic"; interrupt-controller; reg = <0xf3f80000 0x40000>; }; }; pci0: pci@feff0000 { #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; device_type = "pci"; compatible = "hawk-pci"; reg = <0xfec00000 0x400000>; 8259-interrupt-acknowledge = <0xfeff0030>; ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0x800000 0x2000000 0x0 0x80000000 0x80000000 0x0 0x74000000>; bus-range = <0 255>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = < /* * This definition (IDSEL 11) duplicates the * interrupts definition in the i8259 * interrupt controller below. * * Do not change the interrupt sense/polarity from * 0x2 to anything else, doing so will cause endless * "spurious" i8259 interrupts to be fielded. */ // IDSEL 11 - iPMC712 PCI/ISA Bridge 0x5800 0x0 0x0 0x1 &mpic 0x0 0x2 0x5800 0x0 0x0 0x2 &mpic 0x0 0x2 0x5800 0x0 0x0 0x3 &mpic 0x0 0x2 0x5800 0x0 0x0 0x4 &mpic 0x0 0x2 /* IDSEL 12 - Not Used */ /* IDSEL 13 - Universe VME Bridge */ 0x6800 0x0 0x0 0x1 &mpic 0x5 0x1 0x6800 0x0 0x0 0x2 &mpic 0x6 0x1 0x6800 0x0 0x0 0x3 &mpic 0x7 0x1 0x6800 0x0 0x0 0x4 &mpic 0x8 0x1 /* IDSEL 14 - ENET 1 */ 0x7000 0x0 0x0 0x1 &mpic 0x2 0x1 /* IDSEL 15 - Not Used */ /* IDSEL 16 - PMC Slot 1 */ 0x8000 0x0 0x0 0x1 &mpic 0x9 0x1 0x8000 0x0 0x0 0x2 &mpic 0xa 0x1 0x8000 0x0 0x0 0x3 &mpic 0xb 0x1 0x8000 0x0 0x0 0x4 &mpic 0xc 0x1 /* IDSEL 17 - PMC Slot 2 */ 0x8800 0x0 0x0 0x1 &mpic 0xc 0x1 0x8800 0x0 0x0 0x2 &mpic 0x9 0x1 0x8800 0x0 0x0 0x3 &mpic 0xa 0x1 0x8800 0x0 0x0 0x4 &mpic 0xb 0x1 /* IDSEL 18 - Not Used */ /* IDSEL 19 - ENET 2 */ 0x9800 0x0 0x0 0x1 &mpic 0xd 0x1 /* IDSEL 20 - PMCSPAN (PCI-X) */ 0xa000 0x0 0x0 0x1 &mpic 0x9 0x1 0xa000 0x0 0x0 0x2 &mpic 0xa 0x1 0xa000 0x0 0x0 0x3 &mpic 0xb 0x1 0xa000 0x0 0x0 0x4 &mpic 0xc 0x1 >; isa { #address-cells = <2>; #size-cells = <1>; #interrupt-cells = <2>; device_type = "isa"; compatible = "isa"; ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>; interrupt-parent = <&i8259>; i8259: interrupt-controller@20 { #interrupt-cells = <2>; #address-cells = <0>; interrupts = <0 2>; device_type = "interrupt-controller"; compatible = "chrp,iic"; interrupt-controller; reg = <1 0x00000020 0x00000002 1 0x000000a0 0x00000002 1 0x000004d0 0x00000002>; interrupt-parent = <&mpic>; }; }; }; chosen { stdout-path = &serial0; }; };