blob: 5d675883fd497ff149572b848826f0360fba10cb (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
|
wm 32 MX6_IOM_DRAM_SDQS0 0x00000030
wm 32 MX6_IOM_DRAM_SDQS1 0x00000030
wm 32 MX6_IOM_DRAM_SDQS2 0x00000030
wm 32 MX6_IOM_DRAM_SDQS3 0x00000030
wm 32 MX6_IOM_DRAM_SDQS4 0x00000030
wm 32 MX6_IOM_DRAM_SDQS5 0x00000030
wm 32 MX6_IOM_DRAM_SDQS6 0x00000030
wm 32 MX6_IOM_DRAM_SDQS7 0x00000030
wm 32 MX6_IOM_GRP_B0DS 0x00000030
wm 32 MX6_IOM_GRP_B1DS 0x00000030
wm 32 MX6_IOM_GRP_B2DS 0x00000030
wm 32 MX6_IOM_GRP_B3DS 0x00000030
wm 32 MX6_IOM_GRP_B4DS 0x00000030
wm 32 MX6_IOM_GRP_B5DS 0x00000030
wm 32 MX6_IOM_GRP_B6DS 0x00000030
wm 32 MX6_IOM_GRP_B7DS 0x00000030
wm 32 MX6_IOM_GRP_ADDDS 0x00000030
/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */
wm 32 MX6_IOM_GRP_CTLDS 0x00000030
wm 32 MX6_IOM_DRAM_DQM0 0x00020030
wm 32 MX6_IOM_DRAM_DQM1 0x00020030
wm 32 MX6_IOM_DRAM_DQM2 0x00020030
wm 32 MX6_IOM_DRAM_DQM3 0x00020030
wm 32 MX6_IOM_DRAM_DQM4 0x00020030
wm 32 MX6_IOM_DRAM_DQM5 0x00020030
wm 32 MX6_IOM_DRAM_DQM6 0x00020030
wm 32 MX6_IOM_DRAM_DQM7 0x00020030
wm 32 MX6_IOM_DRAM_CAS 0x00020030
wm 32 MX6_IOM_DRAM_RAS 0x00020030
wm 32 MX6_IOM_DRAM_SDCLK_0 0x00020030
wm 32 MX6_IOM_DRAM_SDCLK_1 0x00020030
wm 32 MX6_IOM_DRAM_RESET 0x00020030
wm 32 MX6_IOM_DRAM_SDCKE0 0x00003000
wm 32 MX6_IOM_DRAM_SDCKE1 0x00003000
wm 32 MX6_IOM_DRAM_SDODT0 0x00003030
wm 32 MX6_IOM_DRAM_SDODT1 0x00003030
/* (differential input) */
wm 32 MX6_IOM_DDRMODE_CTL 0x00020000
/* (differential input) */
wm 32 MX6_IOM_GRP_DDRMODE 0x00020000
/* disable ddr pullups */
wm 32 MX6_IOM_GRP_DDRPKE 0x00000000
wm 32 MX6_IOM_DRAM_SDBA2 0x00000000
/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */
wm 32 MX6_IOM_GRP_DDR_TYPE 0x000C0000
/* Read data DQ Byte0-3 delay */
wm 32 MX6_MMDC_P0_MPRDDQBY0DL 0x33333333
wm 32 MX6_MMDC_P0_MPRDDQBY1DL 0x33333333
wm 32 MX6_MMDC_P0_MPRDDQBY2DL 0x33333333
wm 32 MX6_MMDC_P0_MPRDDQBY3DL 0x33333333
wm 32 MX6_MMDC_P1_MPRDDQBY0DL 0x33333333
wm 32 MX6_MMDC_P1_MPRDDQBY1DL 0x33333333
wm 32 MX6_MMDC_P1_MPRDDQBY2DL 0x33333333
wm 32 MX6_MMDC_P1_MPRDDQBY3DL 0x33333333
/* MDMISC mirroring-off interleaved (row/bank/col) */
wm 32 MX6_MMDC_P0_MDMISC 0x00001740
/* MDSCR con_req */
wm 32 MX6_MMDC_P0_MDSCR 0x00008000
|