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soc imx6
loadaddr 0x20000000
ivtofs 0x400
#include <mach/imx6-ddr-regs.h>
#include <mach/imx6q-ddr-regs.h>
wm 32 0x020e00a4 0x00000016
wm 32 0x020e00c4 0x00000011
wm 32 0x020e03b8 0x0000f079
wm 32 0x020e03d8 0x0000f079
wm 32 0x020e0898 0x00000000
wm 32 0x020e089c 0x00000000
wm 32 0x020e0248 0x00000012
wm 32 0x020e02c8 0x00000015
wm 32 0x020e06b0 0x000030b0
wm 32 0x020e00a0 0x00000015
wm 32 0x020e03b4 0x000030b0
wm 32 0x020e024c 0x00000005
wm 32 0x020e061c 0x000030b0
wm 32 0x020c402c 0x006336c1
wm 32 0x020c4034 0x00012093
wm 32 0x020c4038 0x00012090
wm 32 0x020c80e0 0x00002001
wm 32 0x020c80a0 0x80082029
wm 32 0x020c80b0 0x00065b9a
wm 32 0x020c80c0 0x000f4240
wm 32 0x020e0004 0x48640005
wm 32 0x020e02a8 0x00000001
wm 32 0x020e02ac 0x00000001
wm 32 0x020e0920 0x00000003
wm 32 0x020e02c0 0x00000001
wm 32 0x020e02c4 0x00000001
wm 32 0x020e091c 0x00000003
wm 32 0x020e02ec 0x00000000
wm 32 MX6_IOM_DRAM_DQM0 0x00020030
wm 32 MX6_IOM_DRAM_DQM1 0x00020030
wm 32 MX6_IOM_DRAM_DQM2 0x00020030
wm 32 MX6_IOM_DRAM_DQM3 0x00020030
wm 32 MX6_IOM_DRAM_DQM4 0x00020030
wm 32 MX6_IOM_DRAM_DQM5 0x00020030
wm 32 MX6_IOM_DRAM_DQM6 0x00020030
wm 32 MX6_IOM_DRAM_DQM7 0x00020030
wm 32 0x020e052c 0x00020200
wm 32 0x020e0530 0x00020200
wm 32 0x020e0534 0x00020200
wm 32 0x020e0538 0x00020200
wm 32 0x020e053c 0x00020200
wm 32 0x020e0540 0x00020200
wm 32 0x020e0544 0x00020200
wm 32 0x020e0548 0x00020200
wm 32 0x020e054c 0x00020200
wm 32 0x020e0550 0x00020200
wm 32 0x020e0554 0x00020200
wm 32 0x020e0558 0x00020200
wm 32 0x020e055c 0x00020200
wm 32 0x020e0560 0x00020200
wm 32 0x020e0564 0x00020200
wm 32 0x020e0568 0x00020200
wm 32 MX6_IOM_DRAM_CAS 0x00020030
wm 32 MX6_IOM_DRAM_RAS 0x00020030
wm 32 MX6_IOM_DRAM_SDCLK_0 0x00020030
wm 32 MX6_IOM_DRAM_SDCLK_1 0x00020030
wm 32 MX6_IOM_DRAM_RESET 0x00020030
wm 32 MX6_IOM_DRAM_SDCKE0 0x00003000
wm 32 MX6_IOM_DRAM_SDCKE1 0x00003000
wm 32 0x020e0580 0x00000000
wm 32 0x020e0584 0x00000000
wm 32 MX6_IOM_DRAM_SDBA2 0x00000000
wm 32 MX6_IOM_DRAM_SDODT0 0x00003030
wm 32 MX6_IOM_DRAM_SDODT1 0x00003030
wm 32 MX6_IOM_GRP_B0DS 0x00000030
wm 32 MX6_IOM_GRP_B1DS 0x00000030
wm 32 MX6_IOM_GRP_B2DS 0x00000030
wm 32 MX6_IOM_GRP_B3DS 0x00000030
wm 32 MX6_IOM_GRP_B4DS 0x00000030
wm 32 MX6_IOM_GRP_B5DS 0x00000030
wm 32 MX6_IOM_GRP_B6DS 0x00000030
wm 32 MX6_IOM_GRP_B7DS 0x00000030
wm 32 MX6_IOM_GRP_ADDDS 0x00000030
wm 32 MX6_IOM_DDRMODE_CTL 0x00020000
wm 32 MX6_IOM_GRP_DDRPKE 0x00000000
wm 32 MX6_IOM_GRP_DDRMODE 0x00020000
wm 32 MX6_IOM_GRP_CTLDS 0x00000030
wm 32 MX6_IOM_GRP_DDR_TYPE 0x000c0000
wm 32 0x020e0768 0x00002000
wm 32 0x020e0770 0x00000000
wm 32 0x020e0754 0x00000200
wm 32 0x020e075c 0x00000200
wm 32 0x020e0760 0x00000200
wm 32 0x020e0764 0x00000200
wm 32 0x020e076c 0x00000200
wm 32 0x020e0778 0x00000200
wm 32 0x020e077c 0x00000200
wm 32 0x020e0780 0x00000200
wm 32 MX6_MMDC_P0_MDSCR 0x04008010
wm 32 MX6_MMDC_P0_MDSCR 0x04008040
wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390001
wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x001e001e
wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x001e001e
wm 32 MX6_MMDC_P1_MPWLDECTRL0 0x001e001e
wm 32 MX6_MMDC_P1_MPWLDECTRL1 0x001e001e
wm 32 MX6_MMDC_P0_MPDGCTRL0 0x43430349
wm 32 MX6_MMDC_P0_MPDGCTRL1 0x03330334
wm 32 MX6_MMDC_P1_MPDGCTRL0 0x434b0351
wm 32 MX6_MMDC_P1_MPDGCTRL1 0x033d030e
wm 32 MX6_MMDC_P0_MPRDDLCTL 0x40404040
wm 32 MX6_MMDC_P0_MPWRDLCTL 0x40404040
wm 32 MX6_MMDC_P1_MPRDDLCTL 0x40404040
wm 32 MX6_MMDC_P1_MPWRDLCTL 0x40404040
wm 32 MX6_MMDC_P0_MPRDDQBY0DL 0x33333333
wm 32 MX6_MMDC_P0_MPRDDQBY1DL 0x33333333
wm 32 MX6_MMDC_P0_MPRDDQBY2DL 0x33333333
wm 32 MX6_MMDC_P0_MPRDDQBY3DL 0x33333333
wm 32 MX6_MMDC_P1_MPRDDQBY0DL 0x33333333
wm 32 MX6_MMDC_P1_MPRDDQBY1DL 0x33333333
wm 32 MX6_MMDC_P1_MPRDDQBY2DL 0x33333333
wm 32 MX6_MMDC_P1_MPRDDQBY3DL 0x33333333
wm 32 MX6_MMDC_P0_MPMUR0 0x00000800
wm 32 MX6_MMDC_P1_MPMUR0 0x00000800
wm 32 MX6_MMDC_P0_MDMISC 0x00000742
check 32 until_all_bits_set MX6_MMDC_P0_MDMISC 0x00000002
wm 32 MX6_MMDC_P0_MDSCR 0x00008000
check 32 until_any_bit_set MX6_MMDC_P0_MDSCR 0x00004000
wm 32 MX6_MMDC_P0_MDCTL 0x831a0000
check 32 until_any_bit_set MX6_MMDC_P0_MDMISC 0x40000000
wm 32 MX6_MMDC_P0_MDCFG0 0x545a79a4
wm 32 MX6_MMDC_P0_MDCFG1 0xff538e64
wm 32 MX6_MMDC_P0_MDCFG2 0x01ff00dd
wm 32 MX6_MMDC_P0_MDRWD 0x000026d2
wm 32 MX6_MMDC_P0_MDOR 0x005a1023
wm 32 MX6_MMDC_P0_MDOTC 0x24444040
wm 32 MX6_MMDC_P0_MDPDC 0x00020076
wm 32 MX6_MMDC_P0_MDASP 0x00000027
wm 32 MX6_MMDC_P0_MDSCR 0x09308030
wm 32 MX6_MMDC_P0_MDSCR 0x00048031
wm 32 MX6_MMDC_P0_MDSCR 0x00488032
wm 32 MX6_MMDC_P0_MDSCR 0x00008033
wm 32 MX6_MMDC_P0_MDREF 0x0000c000
wm 32 MX6_MMDC_P0_MDSCR 0x00008020
wm 32 MX6_MMDC_P0_MPODTCTRL 0x00022222
wm 32 MX6_MMDC_P1_MPODTCTRL 0x00022222
wm 32 MX6_MMDC_P0_MPPDCMPR2 0x00000003
wm 32 MX6_MMDC_P0_MAPSR 0x00000001
wm 32 MX6_MMDC_P0_MDSCR 0x04008010
wm 32 MX6_MMDC_P0_MDSCR 0x04008040
wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390001
check 32 until_all_bits_set MX6_MMDC_P0_MPZQHWCTRL 0x00010000
wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1380000
wm 32 MX6_MMDC_P0_MDSCR 0x00048033
wm 32 MX6_IOM_DRAM_SDQS0 0x00000030
wm 32 MX6_IOM_DRAM_SDQS1 0x00000030
wm 32 MX6_IOM_DRAM_SDQS2 0x00000030
wm 32 MX6_IOM_DRAM_SDQS3 0x00000030
wm 32 MX6_IOM_DRAM_SDQS4 0x00000030
wm 32 MX6_IOM_DRAM_SDQS5 0x00000030
wm 32 MX6_IOM_DRAM_SDQS6 0x00000030
wm 32 MX6_IOM_DRAM_SDQS7 0x00000030
wm 32 MX6_MMDC_P0_MDSCR 0x04008050
wm 32 MX6_MMDC_P0_MPRDDLHWCTL 0x00000030
wm 32 MX6_MMDC_P1_MPRDDLHWCTL 0x00000030
check 32 until_all_bits_set MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f
check 32 until_all_bits_set MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f
wm 32 MX6_MMDC_P0_MDSCR 0x04008050
wm 32 MX6_MMDC_P0_MPWRDLHWCTL 0x00000030
check 32 until_all_bits_set MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f
wm 32 MX6_MMDC_P0_MDSCR 0x04008050
wm 32 MX6_MMDC_P1_MPWRDLHWCTL 0x00000030
check 32 until_all_bits_set MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f
wm 32 MX6_MMDC_P0_MDSCR 0x00008033
wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa138002b
wm 32 MX6_MMDC_P0_MDREF 0x00001800
wm 32 MX6_MMDC_P0_MAPSR 0x00001000
wm 32 MX6_MMDC_P0_MDPDC 0x00025576
wm 32 MX6_MMDC_P0_MDSCR 0x00000000
check 32 until_all_bits_set MX6_MMDC_P0_MDSCR 0x00004000
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