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path: root/arch/arm/dts/imx6qdl-cm-fx6.dtsi
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/*
 * Copyright 2014 CompuLab Ltd.
 *
 * Author: Valentin Raevsky <valentin@compulab.co.il>
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/ {
	barebox_environment {
		compatible = "barebox,environment";
		device-path = &barebox_env;
	};

	leds {
		compatible = "gpio-leds";
		heartbeat-led {
			label = "Heartbeat";
			gpios = <&gpio2 31 0>;
			linux,default-trigger = "heartbeat";
		};
	};

	/* regulator for usb otg */
	reg_usb_otg_vbus: usb_otg_vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio3 22 0>;
		enable-active-high;
	};

	/* regulator1 for pcie power-on-gpio */
	pcie_power_on_gpio: regulator-pcie-power-on-gpio {
		compatible = "regulator-fixed";
		regulator-name = "regulator-pcie-power-on-gpio";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio2 24 0>;
		enable-active-high;
	};

	/* regulator for usb hub1 */
	reg_usb_h1_vbus: usb_h1_vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_h1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio7 8 0>;
		enable-active-high;
	};

	/* regulator1 for wifi/bt */
	awnh387_npoweron: regulator-awnh387-npoweron {
		compatible = "regulator-fixed";
		regulator-name = "regulator-awnh387-npoweron";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio7 12 0>;
		enable-active-high;
	};

	/* regulator2 for wifi/bt */
	awnh387_wifi_nreset: regulator-awnh387-wifi-nreset {
		compatible = "regulator-fixed";
		regulator-name = "regulator-awnh387-wifi-nreset";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio6 16 0>;
		startup-delay-us = <10000>;
	};

	tsc2046reg: tsc2046-reg {
		compatible = "regulator-fixed";
		regulator-name = "tsc2046-reg";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	hog {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				/* SATA PWR */
				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000
				MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000
				MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
				MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000
				/* SATA CTRL */
				MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000
				MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
				MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000
				MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
				/* POWER_BUTTON */
				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
			>;
		};
	};

	imx6q-cm-fx6 {
		/* pins for eth0 */
		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC      0x1b0b0
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0      0x1b0b0
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1      0x1b0b0
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2      0x1b0b0
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3      0x1b0b0
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC      0x1b0b0
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0      0x1b0b0
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1      0x1b0b0
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2      0x1b0b0
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3      0x1b0b0
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK   0x1b0b0
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO      0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC      0x1b0b0
			>;
		};

		pinctrl_ipu1_lcd: ipu1grp-lcd {
			fsl,pins = <
				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x38
				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x38
				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x38
				MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04        0x80000028
				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x38
				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x38
				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x38
				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x38
				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x38
				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x38
				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x38
				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x38
				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x38
				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x38
				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x38
				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x38
				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x38
				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x38
				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x38
				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x38
				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x38
				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x38
				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x38
				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x38
				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x38
				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x38
				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x38
				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x38
			>;
		};

		/* pins for spi */
		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK      0x100b1
				MX6QDL_PAD_EIM_D17__ECSPI1_MISO      0x100b1
				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI      0x100b1
				MX6QDL_PAD_EIM_EB2__GPIO2_IO30      0x100b1
				MX6QDL_PAD_EIM_D19__GPIO3_IO19      0x100b1
			>;
		};

		/* pins for nand */
		pinctrl_gpmi_nand: gpminandgrp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_CLE__NAND_CLE      0xb0b1
				MX6QDL_PAD_NANDF_ALE__NAND_ALE      0xb0b1
				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
				MX6QDL_PAD_NANDF_RB0__NAND_READY_B   0xb000
				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B   0xb0b1
				MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
				MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
				MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
				MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
				MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
				MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
				MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
				MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
				MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
				MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
				MX6QDL_PAD_SD4_DAT0__NAND_DQS      0x00b1
			>;
		};

		/* pins for i2c2 */
		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
			>;
		};

		/* pins for i2c3 */
		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
				MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
			>;
		};

		/* pins for console */
		pinctrl_uart4: uart4grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA   0x1b0b1
				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA   0x1b0b1
			>;
		};

		/* pins for usb hub1 */
		pinctrl_usbh1: usbh1grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
			>;
		};

		/* pins for usb otg */
		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
				MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
			>;
		};

		/* pins for wifi/bt */
		pinctrl_usdhc1: usdhc1grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17071
				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10071
				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
			>;
		};

		/* pins for wifi/bt */
		pinctrl_mrvl1: mrvl1grp {
			fsl,pins = <
				/* WIFI_PWR_RST */
				MX6QDL_PAD_GPIO_17__GPIO7_IO12	0x80000000
				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000
			>;
		};

		/* pins for tsc2046 pendown */
		pinctrl_tsc2046: tsc2046grp {
			fsl,pins = <
				 /* tsc2046 PENDOWN */
				MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000
			>;
		};

		/* pins for pcie */
		pinctrl_pcie: pciegrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000
				MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
			>;
		};

		/* pins for spdif */
		pinctrl_spdif: spdifgrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_16__SPDIF_IN  0x1b0b0
				MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
			>;
		};

		/* pins for audmux */
		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__AUD4_RXC   0x17059
				MX6QDL_PAD_SD2_DAT0__AUD4_RXD  0x17059
				MX6QDL_PAD_SD2_DAT3__AUD4_TXC  0x17059
				MX6QDL_PAD_SD2_DAT2__AUD4_TXD  0x17059
				MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
				/* master mode pin */
				MX6QDL_PAD_GPIO_5__CCM_CLKO1	0x17059
			>;
		};
	};
};

/* spi */
&ecspi1 {
	fsl,spi-num-chipselects = <2>;
	cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	flash: m25p80@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25px16", "st,m25p";
		spi-max-frequency = <20000000>;
		reg = <0>;

		partition@0 {
			label = "barebox";
			reg = <0x0 0x100000>;
		};

		barebox_env: partition@100000 {
			label = "barebox-environment";
			reg = <0x100000 0x40000>;
		};
	};

	/* touch controller */
	touch:	tsc2046@1 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_tsc2046>;

		compatible = "ti,tsc2046";
		vcc-supply = <&tsc2046reg>;

		reg = <1>;	/* CS1 */
		spi-max-frequency = <1500000>;

		interrupt-parent = <&gpio2>;
		interrupts = <15 0>;
		pendown-gpio = <&gpio2 15 0>;

		ti,x-min = /bits/ 16 <0x0>;
		ti,x-max = /bits/ 16 <0x0fff>;
		ti,y-min = /bits/ 16 <0x0>;
		ti,y-max = /bits/ 16 <0x0fff>;

		ti,x-plate-ohms = /bits/ 16 <180>;
		ti,pressure-max = /bits/ 16 <255>;

		ti,debounce-max = /bits/ 16 <30>;
		ti,debounce-tol = /bits/ 16 <10>;
		ti,debounce-rep = /bits/ 16 <1>;

		linux,wakeup;
	};
};

/* eth0 */
&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	status = "okay";
};

/* nand */
&gpmi {
	#address-cells = <1>;
	#size-cells = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";

	partition@0 {
		label = "linux";
		reg = <0x0 0x800000>;
	};

	partition@800000 {
		label = "rootfs";
		reg = < 0x800000 0x0>;
	};
};

/* i2c3 */
&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	eeprom@50 {
		compatible = "at24,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	codec: wm8731@1a {
		compatible = "wlf,wm8731";
		reg = <0x1a>;
		clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>;
		clock-names = "pll4", "imx-ssi.1", "cko", "cko2";
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio1 26 0>;
	vdd-supply = <&pcie_power_on_gpio>;
	status = "okay";
};

/* console */
&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "okay";
};

/* usb otg */
&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	dr_mode = "otg";
	status = "okay";
};

/* usb hub1 */
&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbh1>;
	status = "okay";
};

/* wifi/bt */
&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_mrvl1>;
	non-removable;
	vmmc-supply = <&awnh387_npoweron>;
	vmmc_aux-supply = <&awnh387_wifi_nreset>;
	status = "okay";
};

&ssi2 {
	fsl,mode = "i2s-master";
	status = "okay";
};

&spdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spdif>;
	status = "okay";
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";
};