arch/arm/dts/socfpga.dtsi


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/ {
	aliases {
		mmc0 = &mmc;
	};

	soc {
		qspi: spi@ff705000 {
			compatible = "cdns,qspi-nor";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0xff705000 0x1000>,
			      <0xffa00000 0x1000>;
			interrupts = <0 151 4>;
			ext-decoder = <0>;  /* external decoder */
			fifo-depth = <128>;
			clocks = <&qspi_clk>;
			clock-names = "qspi_clk";
			status = "disabled";
		};

		fpgamgr@ff706000 {
			compatible = "altr,socfpga-fpga-mgr";
			reg = <0xff706000 0x1000>,
			      <0xffb90000 0x1000>;
		};

		system_mgr: sysmgr@ffd08000 {
			compatible = "altr,sys-mgr", "syscon";
			reg = <0xffd08000 0x4000>;
		};
       };
};
&osc2 {
	clock-frequency = <0>;
};

&f2s_periph_ref_clk {
	clock-frequency = <0>;
};

&f2s_sdram_ref_clk {
	clock-frequency = <0>;
};