arch/arm/dts/stm32mp151-prtt1l-net.dtsi


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// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
// SPDX-FileCopyrightText: 2021 David Jander, Protonic Holland
// SPDX-FileCopyrightText: 2021 Oleksij Rempel, Pengutronix

&ethernet0 {
	pinctrl-0 = <&ethernet0_rmii_pins_a>;
	pinctrl-names = "default";
	phy-mode = "rmii";
	phy-reset-gpios = <&gpioa 3 GPIO_ACTIVE_LOW>;
	status = "okay";

	mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
		phy0: ethernet-phy@0 {
			reg = <0>;
		};
	};
};

&ethernet0_rmii_pins_a {
	pins1 {
		pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */
			 <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */
			 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
			 <STM32_PINMUX('A', 2, AF11)>,  /* ETH1_MDIO */
			 <STM32_PINMUX('C', 1, AF11)>;  /* ETH1_MDC */
	};
	pins2 {
		pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
			 <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
			 <STM32_PINMUX('A', 1, AF11)>,  /* ETH1_RMII_REF_CLK input */
			 <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
	};
};