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/include/ "skeleton.dtsi"

/ {
	compatible = "nvidia,tegra20";

	timer@60005000 {
		compatible = "nvidia,tegra20-timer";
		reg = <0x60005000 0x60>;
		interrupts = <0 0 0x04
			      0 1 0x04
			      0 41 0x04
			      0 42 0x04>;
	};

	tegra_car: clock {
		compatible = "nvidia,tegra20-car";
		reg = <0x60006000 0x1000>;
		#clock-cells = <1>;
	};

	gpio: gpio {
		compatible = "nvidia,tegra20-gpio";
		reg = <0x6000d000 0x1000>;
		interrupts = <0 32 0x04
			      0 33 0x04
			      0 34 0x04
			      0 35 0x04
			      0 55 0x04
			      0 87 0x04
			      0 89 0x04>;
		#gpio-cells = <2>;
		gpio-controller;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	pinmux: pinmux {
	compatible = "nvidia,tegra20-pinmux";
	reg = <0x70000014 0x10   /* Tri-state registers */
	       0x70000080 0x20   /* Mux registers */
	       0x700000a0 0x14   /* Pull-up/down registers */
	       0x70000868 0xa8>; /* Pad control registers */
	};

	pmc {
		compatible = "nvidia,tegra20-pmc";
		reg = <0x7000e400 0x400>;
	};

	sdhci@c8000000 {
		compatible = "nvidia,tegra20-sdhci";
		reg = <0xc8000000 0x200>;
		interrupts = <0 14 0x04>;
		clocks = <&tegra_car 14>;
		status = "disabled";
	};

	sdhci@c8000200 {
		compatible = "nvidia,tegra20-sdhci";
		reg = <0xc8000200 0x200>;
		interrupts = <0 15 0x04>;
		clocks = <&tegra_car 9>;
		status = "disabled";
	};

	sdhci@c8000400 {
		compatible = "nvidia,tegra20-sdhci";
		reg = <0xc8000400 0x200>;
		interrupts = <0 19 0x04>;
		clocks = <&tegra_car 69>;
		status = "disabled";
	};

	sdhci@c8000600 {
		compatible = "nvidia,tegra20-sdhci";
		reg = <0xc8000600 0x200>;
		interrupts = <0 31 0x04>;
		clocks = <&tegra_car 15>;
		status = "disabled";
	};
};