summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-imx/speed-imx31.c
blob: a626692d3ebe3d92381af80f40480f778ca306b2 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
/*
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#include <init.h>

ulong imx_get_mpl_dpdgck_clk(void)
{
	ulong infreq;

	if ((__REG(CCM_CCMR) & CCMR_PRCS_MASK) == CCMR_FPM)
		infreq = CONFIG_MX31_CLK32 * 1024;
	else
		infreq = CONFIG_MX31_HCLK_FREQ;

	return imx_decode_pll(__REG(CCM_MPCTL), infreq);
}

ulong imx_get_mcu_main_clk(void)
{
	/* For now we assume mpl_dpdgck_clk == mcu_main_clk
	 * which should be correct for most boards
	 */
	return imx_get_mpl_dpdgck_clk();
}

ulong imx_get_perclk1(void)
{
	u32 freq = imx_get_mcu_main_clk();
	u32 pdr0 = __REG(CCM_PDR0);

	freq /= ((pdr0 >> 3) & 0x7) + 1;
	freq /= ((pdr0 >> 6) & 0x3) + 1;

	return freq;
}

int imx_dump_clocks(void)
{
	ulong cpufreq = imx_get_mcu_main_clk();
	printf("mx31 cpu clock: %dMHz\n",cpufreq / 1000000);
	printf("ipg clock     : %dHz\n", imx_get_perclk1());

	return 0;
}

ulong imx_get_uartclk(void)
{
	return imx_get_perclk1();
}

late_initcall(imx_dump_clocks);