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path: root/arch/mips/dts/jz4755.dtsi
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#include "skeleton.dtsi"

/ {
	soc {
		compatible = "simple-bus";
		model = "Ingenic JZ4755";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		serial0: serial@b0030000 {
			compatible = "ingenic,jz4740-uart";
			reg = <0xb0030000 0x20>;
			reg-shift = <2>;
			clock-frequency = <12000000>;
			status = "disabled";
		};

		serial1: serial@b0031000 {
			compatible = "ingenic,jz4740-uart";
			reg = <0xb0031000 0x20>;
			reg-shift = <2>;
			clock-frequency = <12000000>;
			status = "disabled";
		};

		serial2: serial@b0032000 {
			compatible = "ingenic,jz4740-uart";
			reg = <0xb0032000 0x20>;
			reg-shift = <2>;
			clock-frequency = <12000000>;
			status = "disabled";
		};

		gpio0: gpio@10010000 {
			compatible = "ingenic,jz4740-gpio";
			gpio-controller;
			reg = <0xb0010000 0x100>;
			#gpio-cells = <2>;
		};

		gpio1: gpio@10010100 {
			compatible = "ingenic,jz4740-gpio";
			gpio-controller;
			reg = <0xb0010100 0x100>;
			#gpio-cells = <2>;
		};

		gpio2: gpio@10010200 {
			compatible = "ingenic,jz4740-gpio";
			gpio-controller;
			reg = <0xb0010200 0x100>;
			#gpio-cells = <2>;
		};

		gpio3: gpio@10010300 {
			compatible = "ingenic,jz4740-gpio";
			gpio-controller;
			reg = <0xb0010300 0x100>;
			#gpio-cells = <2>;
		};

		gpio4: gpio@10010400 {
			compatible = "ingenic,jz4740-gpio";
			gpio-controller;
			reg = <0xb0010400 0x100>;
			#gpio-cells = <2>;
		};

		gpio5: gpio@10010500 {
			compatible = "ingenic,jz4740-gpio";
			gpio-controller;
			reg = <0xb0010500 0x100>;
			#gpio-cells = <2>;
		};
	};
};