summaryrefslogtreecommitdiffstats
path: root/cpu/coldfire/start.S
blob: 7e02661e0a3f6964183303ad8f26d4de6853928b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
/*
 *  Copyright (C) 1998	Dan Malek <dmalek@jlc.net>
 *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
 *  Copyright (C) 2000-2003 Wolfgang Denk <wd@denx.de>
 *  Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <config.h>
#include "version.h"

#ifndef  CONFIG_IDENT_STRING
#define  CONFIG_IDENT_STRING ""
#endif

#define MCF_MBAR 0x10000000
#define MEM_BUILTIN_ADDR 0x20000000
#define MEM_BUILTIN_SIZE 0x1000
#define DRAM_ADDR 0x0
#define DRAM_SIZE 0x400000

	.text

        .globl  _start
_start:
	nop
	nop
	move.w #0x2700,%sr

        move.l  #0, %d0
        movec   %d0, %VBR

#ifdef CONFIG_M5272
	move.l  #(MCF_MBAR+1), %d0
        move.c  %d0, %MBAR

	move.l  #(MEM_BUILTIN_ADDR+1), %d0
        movec   %d0, %RAMBAR0

	move.l  #0x01000000, %d0                /* Invalidate cache cmd */
        movec   %d0, %CACR                      /* Invalidate cache */
        move.l  #0x0000c000, %d0                /* Setup cache mask */
        movec   %d0, %ACR0                      /* Enable cache */
        move.l  #0xff00c000, %d0                /* Setup cache mask */
        movec   %d0, %ACR1                      /* Enable cache */
        move.l  #0x80000100, %d0                /* Setup cache mask */
        movec   %d0, %CACR                      /* Enable cache */
#endif

	move.l	#_sbss,%a0
	move.l	#_ebss,%d0
1:
	clr.l	(%a0)+
	cmp.l	%a0,%d0
	bne.s	1b

/*	move.l  #MEM_BUILTIN_ADDR+MEM_BUILTIN_SIZE, %sp */
	move.l  #DRAM_ADDR+DRAM_SIZE, %sp
	clr.l %sp@-

	jsr board_init_f

	.globl	exception_handler
exception_handler:
	move.w #0x2700,%sr
	lea %sp@(-60),%sp
	movem.l %d0-%d7/%a0-%a6,%sp@
	jsr do_exception
	movem.l %sp@,%d0-%d7/%a0-%a6
	lea %sp@(60),%sp
	rte

	.globl	buserror_handler
buserror_handler:
	move.w #0x2700,%sr
	lea %sp@(-60),%sp
	movem.l %d0-%d7/%a0-%a6,%sp@
	jsr do_buserror
	movem.l %sp@,%d0-%d7/%a0-%a6
	lea %sp@(60),%sp
	rte

	.globl	addresserror_handler
addresserror_handler:
	move.w #0x2700,%sr
	lea %sp@(-60),%sp
	movem.l %d0-%d7/%a0-%a6,%sp@
	jsr do_buserror
	movem.l %sp@,%d0-%d7/%a0-%a6
	lea %sp@(60),%sp
	rte

	.globl  get_endaddr
get_endaddr:
	movel #_end,%d0
	rts

#ifdef CONFIG_M5272
	.globl  icache_enable
icache_enable:
	move.l  #0x01000000, %d0                /* Invalidate cache cmd */
        movec   %d0, %CACR                      /* Invalidate cache */
        move.l  #0x0000c000, %d0                /* Setup cache mask */
        movec   %d0, %ACR0                      /* Enable cache */
        move.l  #0xff00c000, %d0                /* Setup cache mask */
        movec   %d0, %ACR1                      /* Enable cache */
        move.l  #0x80000100, %d0                /* Setup cache mask */
        movec   %d0, %CACR                      /* Enable cache */
	moveq	#1, %d0
	move.l	%d0, icache_state
	rts

	.globl  icache_disable
icache_disable:
        move.l  #0x00000100, %d0                /* Setup cache mask */
        movec   %d0, %CACR                      /* Enable cache */
	clr.l   %d0				/* Setup cache mask */
        movec   %d0, %ACR0                      /* Enable cache */
        movec   %d0, %ACR1                      /* Enable cache */
	moveq	#0, %d0
	move.l	%d0, icache_state
	rts
#endif

#ifdef CONFIG_M5282
	.globl  icache_enable
icache_enable:
	rts

	.globl  icache_disable
icache_disable:
	rts
#endif

	.globl	icache_status
icache_status:
	move.l	icache_state, %d0
	rts

	.data
icache_state:
	.long	1

	.globl  version_string
version_string:
	.ascii U_BOOT_VERSION
	.ascii " (", __DATE__, " - ", __TIME__, ")"
	.ascii CONFIG_IDENT_STRING, "\0"