summaryrefslogtreecommitdiffstats
path: root/drivers/crypto/imx-scc/scc.c
blob: 5a35c3506d085efae2608cb227f0d4e09b0e4df4 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
/*
 * Copyright (C) 2016 Pengutronix, Steffen Trumtrar <kernel@pengutronix.de>
 *
 * The driver is based on information gathered from
 * drivers/mxc/security/imx_scc.c which can be found in
 * the Freescale linux-2.6-imx.git in the imx_2.6.35_maintain branch.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 */
#include <common.h>
#include <clock.h>
#include <driver.h>
#include <init.h>
#include <io.h>
#include <crypto.h>
#include <linux/barebox-wrapper.h>
#include <linux/clk.h>
#include <crypto/des.h>

#include "scc.h"

/* Secure Memory (SCM) registers */
#define SCC_SCM_RED_START		0x0000
#define SCC_SCM_BLACK_START		0x0004
#define SCC_SCM_LENGTH			0x0008
#define SCC_SCM_CTRL			0x000C
#define SCC_SCM_STATUS			0x0010
#define SCC_SCM_ERROR_STATUS		0x0014
#define SCC_SCM_INTR_CTRL		0x0018
#define SCC_SCM_CFG			0x001C
#define SCC_SCM_INIT_VECTOR_0		0x0020
#define SCC_SCM_INIT_VECTOR_1		0x0024
#define SCC_SCM_RED_MEMORY		0x0400
#define SCC_SCM_BLACK_MEMORY		0x0800

/* Security Monitor (SMN) Registers */
#define SCC_SMN_STATUS			0x1000
#define SCC_SMN_COMMAND			0x1004
#define SCC_SMN_SEQ_START		0x1008
#define SCC_SMN_SEQ_END			0x100C
#define SCC_SMN_SEQ_CHECK		0x1010
#define SCC_SMN_BIT_COUNT		0x1014
#define SCC_SMN_BITBANK_INC_SIZE	0x1018
#define SCC_SMN_BITBANK_DECREMENT	0x101C
#define SCC_SMN_COMPARE_SIZE		0x1020
#define SCC_SMN_PLAINTEXT_CHECK		0x1024
#define SCC_SMN_CIPHERTEXT_CHECK	0x1028
#define SCC_SMN_TIMER_IV		0x102C
#define SCC_SMN_TIMER_CONTROL		0x1030
#define SCC_SMN_DEBUG_DETECT_STAT	0x1034
#define SCC_SMN_TIMER			0x1038

#define SCC_SCM_CTRL_START_CIPHER	BIT(2)
#define SCC_SCM_CTRL_CBC_MODE		BIT(1)
#define SCC_SCM_CTRL_DECRYPT_MODE	BIT(0)

#define SCC_SCM_STATUS_LEN_ERR		BIT(12)
#define SCC_SCM_STATUS_SMN_UNBLOCKED	BIT(11)
#define SCC_SCM_STATUS_CIPHERING_DONE	BIT(10)
#define SCC_SCM_STATUS_ZEROIZING_DONE	BIT(9)
#define SCC_SCM_STATUS_INTR_STATUS	BIT(8)
#define SCC_SCM_STATUS_SEC_KEY		BIT(7)
#define SCC_SCM_STATUS_INTERNAL_ERR	BIT(6)
#define SCC_SCM_STATUS_BAD_SEC_KEY	BIT(5)
#define SCC_SCM_STATUS_ZEROIZE_FAIL	BIT(4)
#define SCC_SCM_STATUS_SMN_BLOCKED	BIT(3)
#define SCC_SCM_STATUS_CIPHERING	BIT(2)
#define SCC_SCM_STATUS_ZEROIZING	BIT(1)
#define SCC_SCM_STATUS_BUSY		BIT(0)

#define SCC_SMN_STATUS_STATE_MASK	0x0000001F
#define SCC_SMN_STATE_START		0x0
/* The SMN is zeroizing its RAM during reset */
#define SCC_SMN_STATE_ZEROIZE_RAM	0x5
/* SMN has passed internal checks */
#define SCC_SMN_STATE_HEALTH_CHECK	0x6
/* Fatal Security Violation. SMN is locked, SCM is inoperative. */
#define SCC_SMN_STATE_FAIL		0x9
/* SCC is in secure state. SCM is using secret key. */
#define SCC_SMN_STATE_SECURE		0xA
/* SCC is not secure. SCM is using default key. */
#define SCC_SMN_STATE_NON_SECURE	0xC

#define SCC_SCM_INTR_CTRL_ZEROIZE_MEM	BIT(2)
#define SCC_SCM_INTR_CTRL_CLR_INTR	BIT(1)
#define SCC_SCM_INTR_CTRL_MASK_INTR	BIT(0)

/* Size, in blocks, of Red memory. */
#define SCC_SCM_CFG_BLACK_SIZE_MASK	0x07fe0000
#define SCC_SCM_CFG_BLACK_SIZE_SHIFT	17
/* Size, in blocks, of Black memory. */
#define SCC_SCM_CFG_RED_SIZE_MASK	0x0001ff80
#define SCC_SCM_CFG_RED_SIZE_SHIFT	7
/* Number of bytes per block. */
#define SCC_SCM_CFG_BLOCK_SIZE_MASK	0x0000007f

#define SCC_SMN_COMMAND_TAMPER_LOCK	BIT(4)
#define SCC_SMN_COMMAND_CLR_INTR	BIT(3)
#define SCC_SMN_COMMAND_CLR_BIT_BANK	BIT(2)
#define SCC_SMN_COMMAND_EN_INTR		BIT(1)
#define SCC_SMN_COMMAND_SET_SOFTWARE_ALARM  BIT(0)

#define SCC_KEY_SLOTS			20
#define SCC_MAX_KEY_SIZE		32
#define SCC_KEY_SLOT_SIZE		32

#define SCC_CRC_CCITT_START		0xFFFF

/*
 * Offset into each RAM of the base of the area which is not
 * used for Stored Keys.
 */
#define SCC_NON_RESERVED_OFFSET	(SCC_KEY_SLOTS * SCC_KEY_SLOT_SIZE)

/* Fixed padding for appending to plaintext to fill out a block */
static char scc_block_padding[8] = { 0x80, 0, 0, 0, 0, 0, 0, 0 };

struct imx_scc {
	struct device_d	*dev;
	void __iomem		*base;
	struct clk		*clk;
	struct ablkcipher_request *req;
	unsigned int		block_size_bytes;
	unsigned int		black_ram_size_blocks;
	unsigned int		memory_size_bytes;
	unsigned int		bytes_remaining;

	void __iomem		*red_memory;
	void __iomem		*black_memory;
};

struct imx_scc_ctx {
	struct imx_scc		*scc;
	unsigned int		offset;
	unsigned int		size;
	unsigned int		ctrl;
};

static struct imx_scc *scc_dev;

static int imx_scc_get_data(struct imx_scc_ctx *ctx,
			    struct ablkcipher_request *ablkreq)
{
	struct imx_scc *scc = ctx->scc;
	void __iomem *from;

	if (ctx->ctrl & SCC_SCM_CTRL_DECRYPT_MODE)
		from = scc->red_memory;
	else
		from = scc->black_memory;

	memcpy(ablkreq->dst, from + ctx->offset, ctx->size);

	pr_debug("GET_DATA:\n");
	pr_memory_display(MSG_DEBUG, from, 0, ctx->size, 0x40 >> 3, 0);

	ctx->offset += ctx->size;

	if (ctx->offset < ablkreq->nbytes)
		return -EINPROGRESS;

	return 0;
}

static int imx_scc_ablkcipher_req_init(struct ablkcipher_request *req,
				       struct imx_scc_ctx *ctx)
{
	ctx->size = 0;
	ctx->offset = 0;

	return 0;
}

static int imx_scc_put_data(struct imx_scc_ctx *ctx,
			    struct ablkcipher_request *req)
{
	u8 padding_buffer[sizeof(u16) + sizeof(scc_block_padding)];
	size_t len = min(req->nbytes - ctx->offset, ctx->scc->bytes_remaining);
	unsigned int padding_byte_count = 0;
	struct imx_scc *scc = ctx->scc;
	void __iomem *to;

	if (ctx->ctrl & SCC_SCM_CTRL_DECRYPT_MODE)
		to = scc->black_memory;
	else
		to = scc->red_memory;

	if (ctx->ctrl & SCC_SCM_CTRL_CBC_MODE) {
		dev_dbg(scc->dev, "set IV@0x%p\n", scc->base + SCC_SCM_INIT_VECTOR_0);
		memcpy(scc->base + SCC_SCM_INIT_VECTOR_0, req->info,
		       scc->block_size_bytes);
	}

	memcpy(to, req->src + ctx->offset, len);

	ctx->size = len;

	scc->bytes_remaining -= len;

	padding_byte_count = ((len + scc->block_size_bytes - 1) &
			      ~(scc->block_size_bytes-1)) - len;

	if (padding_byte_count) {
		memcpy(padding_buffer, scc_block_padding, padding_byte_count);
		memcpy(to + len, padding_buffer, padding_byte_count);
		ctx->size += padding_byte_count;
	}

	dev_dbg(scc->dev, "copied %d bytes to 0x%p\n", ctx->size, to);
	pr_debug("IV:\n");
	pr_memory_display(MSG_DEBUG, scc->base + SCC_SCM_INIT_VECTOR_0, 0,
			  scc->block_size_bytes,
			     0x40 >> 3, 0);
	pr_debug("DATA:\n");
	pr_memory_display(MSG_DEBUG, to, 0, ctx->size, 0x40 >> 3, 0);

	return 0;
}

static int imx_scc_ablkcipher_next(struct imx_scc_ctx *ctx,
				   struct ablkcipher_request *ablkreq)
{
	struct imx_scc *scc = ctx->scc;
	int err;

	writel(0, scc->base + SCC_SCM_ERROR_STATUS);

	err = imx_scc_put_data(ctx, ablkreq);
	if (err)
		return err;

	dev_dbg(scc->dev, "Start encryption (0x%p/0x%p)\n",
		(void *)readl(scc->base + SCC_SCM_RED_START),
		(void *)readl(scc->base + SCC_SCM_BLACK_START));

	/* clear interrupt control registers */
	writel(SCC_SCM_INTR_CTRL_CLR_INTR,
	       scc->base + SCC_SCM_INTR_CTRL);

	writel((ctx->size / ctx->scc->block_size_bytes) - 1,
	       scc->base + SCC_SCM_LENGTH);

	dev_dbg(scc->dev, "Process %d block(s) in 0x%p\n",
		ctx->size / ctx->scc->block_size_bytes,
		(ctx->ctrl & SCC_SCM_CTRL_DECRYPT_MODE) ? scc->black_memory :
		scc->red_memory);

	writel(ctx->ctrl, scc->base + SCC_SCM_CTRL);

	return 0;
}

static int imx_scc_int(struct imx_scc_ctx *ctx)
{
	struct ablkcipher_request *ablkreq;
	struct imx_scc *scc = ctx->scc;
	uint64_t start;

	start = get_time_ns();
	while (readl(scc->base + SCC_SCM_STATUS) & SCC_SCM_STATUS_BUSY) {
		if (is_timeout(start, 100 * MSECOND)) {
			dev_err(scc->dev, "timeout waiting for interrupt\n");
			return -ETIMEDOUT;
		}
	}

	/* clear interrupt control registers */
	writel(SCC_SCM_INTR_CTRL_CLR_INTR, scc->base + SCC_SCM_INTR_CTRL);

	ablkreq = scc->req;

	if (ablkreq)
		return imx_scc_get_data(ctx, ablkreq);

	return 0;
}

static int imx_scc_process_req(struct imx_scc_ctx *ctx,
			       struct ablkcipher_request *ablkreq)
{
	int ret = -EINPROGRESS;

	ctx->scc->req = ablkreq;

	while (ret == -EINPROGRESS) {
		ret = imx_scc_ablkcipher_next(ctx, ablkreq);
		if (ret)
			break;
		ret = imx_scc_int(ctx);
	}

	ctx->scc->req = NULL;
	ctx->scc->bytes_remaining = ctx->scc->memory_size_bytes;

	return 0;
}

static int imx_scc_des3_op(struct imx_scc_ctx *ctx,
			   struct ablkcipher_request *req)
{
	int err;

	err = imx_scc_ablkcipher_req_init(req, ctx);
	if (err)
		return err;

	return imx_scc_process_req(ctx, req);
}

int imx_scc_cbc_des_encrypt(struct ablkcipher_request *req)
{
	struct imx_scc_ctx *ctx;

	ctx = xzalloc(sizeof(*ctx));
	ctx->scc = scc_dev;

	ctx->ctrl = SCC_SCM_CTRL_START_CIPHER;
	ctx->ctrl |= SCC_SCM_CTRL_CBC_MODE;

	return imx_scc_des3_op(ctx, req);
}

int imx_scc_cbc_des_decrypt(struct ablkcipher_request *req)
{
	struct imx_scc_ctx *ctx;

	ctx = xzalloc(sizeof(*ctx));
	ctx->scc = scc_dev;

	ctx->ctrl = SCC_SCM_CTRL_START_CIPHER;
	ctx->ctrl |= SCC_SCM_CTRL_CBC_MODE;
	ctx->ctrl |= SCC_SCM_CTRL_DECRYPT_MODE;

	return imx_scc_des3_op(ctx, req);
}

static void imx_scc_hw_init(struct imx_scc *scc)
{
	int offset;

	offset = SCC_NON_RESERVED_OFFSET / scc->block_size_bytes;

	/* Fill the RED_START register */
	writel(offset, scc->base + SCC_SCM_RED_START);

	/* Fill the BLACK_START register */
	writel(offset, scc->base + SCC_SCM_BLACK_START);

	scc->red_memory = scc->base + SCC_SCM_RED_MEMORY +
			  SCC_NON_RESERVED_OFFSET;

	scc->black_memory = scc->base + SCC_SCM_BLACK_MEMORY +
			    SCC_NON_RESERVED_OFFSET;

	scc->bytes_remaining = scc->memory_size_bytes;
}

static int imx_scc_get_config(struct imx_scc *scc)
{
	int config;

	config = readl(scc->base + SCC_SCM_CFG);

	scc->block_size_bytes = config & SCC_SCM_CFG_BLOCK_SIZE_MASK;

	scc->black_ram_size_blocks = config & SCC_SCM_CFG_BLACK_SIZE_MASK;

	scc->memory_size_bytes = (scc->block_size_bytes *
				  scc->black_ram_size_blocks) -
				  SCC_NON_RESERVED_OFFSET;

	return 0;
}

static int imx_scc_get_state(struct imx_scc *scc)
{
	int status, ret;
	const char *statestr;

	status = readl(scc->base + SCC_SMN_STATUS) &
		       SCC_SMN_STATUS_STATE_MASK;

	/* If in Health Check, try to bringup to secure state */
	if (status & SCC_SMN_STATE_HEALTH_CHECK) {
		/*
		 * Write a simple algorithm to the Algorithm Sequence
		 * Checker (ASC)
		 */
		writel(0xaaaa, scc->base + SCC_SMN_SEQ_START);
		writel(0x5555, scc->base + SCC_SMN_SEQ_END);
		writel(0x5555, scc->base + SCC_SMN_SEQ_CHECK);

		status = readl(scc->base + SCC_SMN_STATUS) &
			       SCC_SMN_STATUS_STATE_MASK;
	}

	switch (status) {
	case SCC_SMN_STATE_NON_SECURE:
		statestr = "non-secure";
		ret = 0;
		break;
	case SCC_SMN_STATE_SECURE:
		statestr = "secure";
		ret = 0;
		break;
	case SCC_SMN_STATE_FAIL:
		statestr = "fail";
		ret = -EIO;
		break;
	default:
		statestr = "unknown";
		ret = -EINVAL;
		break;
	}

	dev_info(scc->dev, "starting in %s mode\n", statestr);

	return ret;
}

static int imx_scc_probe(struct device_d *dev)
{
	struct imx_scc *scc;
	int ret;

	scc = xzalloc(sizeof(*scc));

	scc->base = dev_request_mem_region(dev, 0);
	if (IS_ERR(scc->base))
		return PTR_ERR(scc->base);

	scc->clk = clk_get(dev, "ipg");
	if (IS_ERR(scc->clk)) {
		dev_err(dev, "Could not get ipg clock\n");
		return PTR_ERR(scc->clk);
	}

	clk_enable(scc->clk);

	/* clear error status register */

	writel(0x0, scc->base + SCC_SCM_ERROR_STATUS);

	/* clear interrupt control registers */
	writel(SCC_SCM_INTR_CTRL_CLR_INTR |
	       SCC_SCM_INTR_CTRL_MASK_INTR,
	       scc->base + SCC_SCM_INTR_CTRL);

	writel(SCC_SMN_COMMAND_CLR_INTR |
	       SCC_SMN_COMMAND_EN_INTR,
	       scc->base + SCC_SMN_COMMAND);

	scc->dev = dev;

	ret = imx_scc_get_config(scc);
	if (ret)
		goto err_out;

	ret = imx_scc_get_state(scc);

	if (ret) {
		dev_err(dev, "SCC in unusable state\n");
		goto err_out;
	}

	imx_scc_hw_init(scc);

	scc_dev = scc;

	if (IS_ENABLED(CONFIG_BLOBGEN)) {
		ret = imx_scc_blob_gen_probe(dev);
		if (ret)
			goto err_out;
	}

	return 0;

err_out:
	clk_disable(scc->clk);
	clk_put(scc->clk);
	free(scc);

	return ret;
}

static __maybe_unused struct of_device_id imx_scc_dt_ids[] = {
	{ .compatible = "fsl,imx25-scc", },
	{ /* sentinel */ }
};

static struct driver_d imx_scc_driver = {
	.name		= "mxc-scc",
	.probe		= imx_scc_probe,
	.of_compatible	= imx_scc_dt_ids,
};
device_platform_driver(imx_scc_driver);