summaryrefslogtreecommitdiffstats
path: root/drivers/gpio/gpio-mpc8xxx.c
blob: 979f92ad3023526bced38356faf6db6b65f70242 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
/*
 * GPIOs on MPC512x/8349/8572/8610/QorIQ and compatible
 *
 * Copyright (C) 2008 Peter Korsgaard <jacmet@sunsite.dk>
 * Copyright (C) 2016 Freescale Semiconductor Inc.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <common.h>
#include <init.h>
#include <gpio.h>
#include <linux/basic_mmio_gpio.h>
#include <linux/clk.h>
#include <malloc.h>
#include <of.h>
#include <of_address.h>
#include <of_device.h>

#define MPC8XXX_GPIO_PINS	32

#define GPIO_DIR		0x00
#define GPIO_ODR		0x04
#define GPIO_DAT		0x08
#define GPIO_IER		0x0c
#define GPIO_IMR		0x10

struct mpc8xxx_gpio_chip {
	struct bgpio_chip	bgc;
	void __iomem		*regs;
};

struct mpc8xxx_gpio_devtype {
	int (*gpio_dir_out)(struct bgpio_chip *, unsigned int, int);
	int (*gpio_get)(struct bgpio_chip *, unsigned int);
};

static int mpc8xxx_probe(struct device_d *dev)
{
	struct device_node *np;
	struct resource *iores;
	struct mpc8xxx_gpio_chip *mpc8xxx_gc;
	struct bgpio_chip *bgc;
	int ret;

	mpc8xxx_gc = xzalloc(sizeof(*mpc8xxx_gc));

	if (dev->device_node) {
		np = dev->device_node;
	} else {
		dev_err(dev, "no device_node\n");
		return -ENODEV;
        }

	iores = dev_request_mem_resource(dev, 0);
	if (IS_ERR(iores))
		return PTR_ERR(iores);

	mpc8xxx_gc->regs = IOMEM(iores->start);
	if (!mpc8xxx_gc->regs)
		return -ENOMEM;

        bgc = &mpc8xxx_gc->bgc;

	if (of_property_read_bool(np, "little-endian")) {
		ret = bgpio_init(bgc, dev, 4,
				 mpc8xxx_gc->regs + GPIO_DAT,
				 NULL, NULL,
				 mpc8xxx_gc->regs + GPIO_DIR, NULL, 0);
		if (ret)
			goto err;
		dev_dbg(dev, "GPIO registers are LITTLE endian\n");
	} else {
		ret = bgpio_init(bgc, dev, 4,
				 mpc8xxx_gc->regs + GPIO_DAT,
				 NULL, NULL,
				 mpc8xxx_gc->regs + GPIO_DIR, NULL,
				 BGPIOF_BIG_ENDIAN);
		if (ret)
			goto err;
		dev_dbg(dev, "GPIO registers are BIG endian\n");
	}

	ret = gpiochip_add(&mpc8xxx_gc->bgc.gc);
	if (ret) {
		pr_err("%pOF: GPIO chip registration failed with status %d\n",
		       np, ret);
		goto err;
	}

	/* ack and mask all irqs */
	bgc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0xffffffff);
	bgc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0);

	return 0;

err:
	return ret;
}

static __maybe_unused struct of_device_id mpc8xxx_gpio_ids[] = {
	{
		.compatible = "fsl,qoriq-gpio",
	},
	{
		/* sentinel */
	},
};

static struct driver_d mpc8xxx_driver = {
	.name		= "mpc8xxx-gpio",
	.probe		= mpc8xxx_probe,
	.of_compatible  = DRV_OF_COMPAT(mpc8xxx_gpio_ids),
};

static int __init mpc8xxx_init(void)
{
	return platform_driver_register(&mpc8xxx_driver);
}
postcore_initcall(mpc8xxx_init);