summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/clock/axs10x-i2s-pll-clock.txt
blob: 5ffc8df7e6da6ce2cab1455f7bf5d00cbe7a8f64 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Binding for the AXS10X I2S PLL clock

This binding uses the common clock binding[1].

[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

Required properties:
- compatible: shall be "snps,axs10x-i2s-pll-clock"
- reg : address and length of the I2S PLL register set.
- clocks: shall be the input parent clock phandle for the PLL.
- #clock-cells: from common clock binding; Should always be set to 0.

Example:
	pll_clock: pll_clock {
		compatible = "fixed-clock";
		clock-frequency = <27000000>;
		#clock-cells = <0>;
	};

	i2s_clock@100a0 {
		compatible = "snps,axs10x-i2s-pll-clock";
		reg = <0x100a0 0x10>;
		clocks = <&pll_clock>;
		#clock-cells = <0>;
	};