summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/clock/qcom,gcc.txt
blob: 8661c3cd3ccf543931c8ca040d9bd09873905387 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
Qualcomm Global Clock & Reset Controller Binding
------------------------------------------------

Required properties :
- compatible : shall contain only one of the following:

			"qcom,gcc-apq8064"
			"qcom,gcc-apq8084"
			"qcom,gcc-ipq8064"
			"qcom,gcc-ipq4019"
			"qcom,gcc-ipq8074"
			"qcom,gcc-msm8660"
			"qcom,gcc-msm8916"
			"qcom,gcc-msm8960"
			"qcom,gcc-msm8974"
			"qcom,gcc-msm8974pro"
			"qcom,gcc-msm8974pro-ac"
			"qcom,gcc-msm8994"
			"qcom,gcc-msm8996"
			"qcom,gcc-msm8998"
			"qcom,gcc-mdm9615"
			"qcom,gcc-qcs404"
			"qcom,gcc-sdm630"
			"qcom,gcc-sdm660"
			"qcom,gcc-sdm845"

- reg : shall contain base register location and length
- #clock-cells : shall contain 1
- #reset-cells : shall contain 1

Optional properties :
- #power-domain-cells : shall contain 1
- Qualcomm TSENS (thermal sensor device) on some devices can
be part of GCC and hence the TSENS properties can also be
part of the GCC/clock-controller node.
For more details on the TSENS properties please refer
Documentation/devicetree/bindings/thermal/qcom-tsens.txt
- protected-clocks : Protected clock specifier list as per common clock
 binding.

Example:
	clock-controller@900000 {
		compatible = "qcom,gcc-msm8960";
		reg = <0x900000 0x4000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		#power-domain-cells = <1>;
	};

Example of GCC with TSENS properties:
	clock-controller@900000 {
		compatible = "qcom,gcc-apq8064";
		reg = <0x00900000 0x4000>;
		nvmem-cells = <&tsens_calib>, <&tsens_backup>;
		nvmem-cell-names = "calib", "calib_backup";
		#clock-cells = <1>;
		#reset-cells = <1>;
		#thermal-sensor-cells = <1>;
	};

Example of GCC with protected-clocks properties:
	clock-controller@100000 {
		compatible = "qcom,gcc-sdm845";
		reg = <0x100000 0x1f0000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		#power-domain-cells = <1>;
		protected-clocks = <GCC_QSPI_CORE_CLK>,
				   <GCC_QSPI_CORE_CLK_SRC>,
				   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
				   <GCC_LPASS_Q6_AXI_CLK>,
				   <GCC_LPASS_SWAY_CLK>;
	};