summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
blob: 31c0fc3459035e985f1aacc0fd153a1a880354ad (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: ZynqMP Mode Pin GPIO controller

description:
  PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin
  GPIO controller with configurable from numbers of pins (from 0 to 3 per
  PS_MODE). Every pin can be configured as input/output.

maintainers:
  - Piyush Mehta <piyush.mehta@xilinx.com>

properties:
  compatible:
    const: xlnx,zynqmp-gpio-modepin

  gpio-controller: true

  "#gpio-cells":
    const: 2

required:
  - compatible
  - gpio-controller
  - "#gpio-cells"

additionalProperties: false

examples:
  - |
    zynqmp-firmware {
        gpio {
            compatible = "xlnx,zynqmp-gpio-modepin";
            gpio-controller;
            #gpio-cells = <2>;
        };
    };

...