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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/mellanox,i2c-mlxbf.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mellanox I2C SMBus on BlueField SoCs
maintainers:
- Khalil Blaiech <kblaiech@nvidia.com>
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
properties:
compatible:
enum:
- mellanox,i2c-mlxbf1
- mellanox,i2c-mlxbf2
reg:
minItems: 3
items:
- description: Smbus block registers
- description: Cause master registers
- description: Cause slave registers
- description: Cause coalesce registers
interrupts:
maxItems: 1
clock-frequency:
enum: [ 100000, 400000, 1000000 ]
description:
bus frequency used to configure timing registers;
The frequency is expressed in Hz. Default is 100000.
required:
- compatible
- reg
- interrupts
unevaluatedProperties: false
if:
properties:
compatible:
contains:
enum:
- mellanox,i2c-mlxbf1
then:
properties:
reg:
maxItems: 3
examples:
- |
i2c@2804000 {
compatible = "mellanox,i2c-mlxbf1";
reg = <0x02804000 0x800>,
<0x02801200 0x020>,
<0x02801260 0x020>;
interrupts = <57>;
clock-frequency = <100000>;
};
- |
i2c@2808800 {
compatible = "mellanox,i2c-mlxbf2";
reg = <0x02808800 0x600>,
<0x02808e00 0x020>,
<0x02808e20 0x020>,
<0x02808e40 0x010>;
interrupts = <57>;
clock-frequency = <400000>;
};
|
