summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/media/allwinner,sun4i-a10-csi.yaml
blob: 8453ee340b9fb0abffb19f48c95391bb0e93e9c9 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

description: |-
  The Allwinner A10 and later has a CMOS Sensor Interface to retrieve
  frames from a parallel or BT656 sensor.

properties:
  compatible:
    oneOf:
      - const: allwinner,sun4i-a10-csi1
      - const: allwinner,sun7i-a20-csi0
      - items:
        - const: allwinner,sun7i-a20-csi1
        - const: allwinner,sun4i-a10-csi1
      - items:
        - const: allwinner,sun8i-r40-csi0
        - const: allwinner,sun7i-a20-csi0

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    oneOf:
      - items:
        - description: The CSI interface clock
        - description: The CSI DRAM clock

      - items:
        - description: The CSI interface clock
        - description: The CSI ISP clock
        - description: The CSI DRAM clock

  clock-names:
    oneOf:
      - items:
        - const: bus
        - const: ram

      - items:
        - const: bus
        - const: isp
        - const: ram

  resets:
    maxItems: 1

  # FIXME: This should be made required eventually once every SoC will
  # have the MBUS declared.
  interconnects:
    maxItems: 1

  # FIXME: This should be made required eventually once every SoC will
  # have the MBUS declared.
  interconnect-names:
    const: dma-mem

  # See ./video-interfaces.txt for details
  port:
    type: object
    additionalProperties: false

    properties:
      endpoint:
        type: object

        properties:
          bus-width:
            enum: [8, 16]

          data-active: true
          hsync-active: true
          pclk-sample: true
          remote-endpoint: true
          vsync-active: true

        required:
          - bus-width
          - data-active
          - hsync-active
          - pclk-sample
          - remote-endpoint
          - vsync-active

    required:
      - endpoint

required:
  - compatible
  - reg
  - interrupts
  - clocks

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/sun7i-a20-ccu.h>
    #include <dt-bindings/reset/sun4i-a10-ccu.h>

    csi0: csi@1c09000 {
        compatible = "allwinner,sun7i-a20-csi0";
        reg = <0x01c09000 0x1000>;
        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
        clock-names = "bus", "isp", "ram";
        resets = <&ccu RST_CSI0>;

        port {
            csi_from_ov5640: endpoint {
                remote-endpoint = <&ov5640_to_csi>;
                bus-width = <8>;
                hsync-active = <1>; /* Active high */
                vsync-active = <0>; /* Active low */
                data-active = <1>;  /* Active high */
                pclk-sample = <1>;  /* Rising */
            };
        };
    };

...