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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/brcm,cru.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom CRU

maintainers:
  - Rafał Miłecki <rafal@milecki.pl>

description: |
  Broadcom CRU ("Clock and Reset Unit" or "Central Resource Unit") is a hardware
  block grouping smaller blocks. On Broadcom Northstar platform it contains e.g.
  clocks, pinctrl, USB PHY and thermal.

properties:
  compatible:
    items:
      - enum:
          - brcm,ns-cru
      - const: simple-mfd

  reg:
    description: CRU registers

  ranges: true

  "#address-cells":
    const: 1

  "#size-cells":
    const: 1

patternProperties:
  '^clock-controller@[a-f0-9]+$':
    $ref: ../clock/brcm,iproc-clocks.yaml

  '^pin-controller@[a-f0-9]+$':
    $ref: ../pinctrl/brcm,ns-pinmux.yaml

  '^thermal@[a-f0-9]+$':
    $ref: ../thermal/brcm,ns-thermal.yaml

additionalProperties: false

required:
  - reg

examples:
  - |
    cru-bus@1800c100 {
        compatible = "brcm,ns-cru", "simple-mfd";
        reg = <0x1800c100 0x1d0>;
        ranges;
        #address-cells = <1>;
        #size-cells = <1>;

        clock-controller@100 {
            #clock-cells = <1>;
            compatible = "brcm,nsp-lcpll0";
            reg = <0x100 0x14>;
            clocks = <&osc>;
            clock-output-names = "lcpll0", "pcie_phy", "sdio", "ddr_phy";
        };

        clock-controller@140 {
            #clock-cells = <1>;
            compatible = "brcm,nsp-genpll";
            reg = <0x140 0x24>;
            clocks = <&osc>;
            clock-output-names = "genpll", "phy", "ethernetclk", "usbclk",
                                 "iprocfast", "sata1", "sata2";
        };

        pin-controller@1c0 {
            compatible = "brcm,bcm4708-pinmux";
            reg = <0x1c0 0x24>;
            reg-names = "cru_gpio_control";
        };

        thermal@2c0 {
            compatible = "brcm,ns-thermal";
            reg = <0x2c0 0x10>;
            #thermal-sensor-cells = <0>;
        };
    };