summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/pinctrl/qcom,pmic-mpp.txt
blob: 2ab95bc26066ce54e09f3866611af2aded817d13 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
Qualcomm PMIC Multi-Purpose Pin (MPP) block

This binding describes the MPP block(s) found in the 8xxx series
of PMIC's from Qualcomm.

- compatible:
	Usage: required
	Value type: <string>
	Definition: Should contain one of:
		    "qcom,pm8018-mpp",
		    "qcom,pm8038-mpp",
		    "qcom,pm8058-mpp",
		    "qcom,pm8821-mpp",
		    "qcom,pm8841-mpp",
		    "qcom,pm8916-mpp",
		    "qcom,pm8917-mpp",
		    "qcom,pm8921-mpp",
		    "qcom,pm8941-mpp",
		    "qcom,pm8994-mpp",
		    "qcom,pma8084-mpp",

		    And must contain either "qcom,spmi-mpp" or "qcom,ssbi-mpp"
		    if the device is on an spmi bus or an ssbi bus respectively.

- reg:
	Usage: required
	Value type: <prop-encoded-array>
	Definition: Register base of the MPP block and length.

- interrupts:
	Usage: required
	Value type: <prop-encoded-array>
	Definition: Must contain an array of encoded interrupt specifiers for
		    each available MPP

- gpio-controller:
	Usage: required
	Value type: <none>
	Definition: Mark the device node as a GPIO controller

- #gpio-cells:
	Usage: required
	Value type: <u32>
	Definition: Must be 2;
		    the first cell will be used to define MPP number and the
		    second denotes the flags for this MPP

Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
a general description of GPIO and interrupt bindings.

Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".

The pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin or a list of pins. This configuration can include the
mux function to select on those pin(s), and various pin configuration
parameters, as listed below.

SUBNODES:

The name of each subnode is not important; all subnodes should be enumerated
and processed purely based on their content.

Each subnode only affects those parameters that are explicitly listed. In
other words, a subnode that lists a mux function but no pin configuration
parameters implies no information about any pin configuration parameters.
Similarly, a pin subnode that describes a pullup parameter implies no
information about e.g. the mux function.

The following generic properties as defined in pinctrl-bindings.txt are valid
to specify in a pin configuration subnode:

- pins:
	Usage: required
	Value type: <string-array>
	Definition: List of MPP pins affected by the properties specified in
		    this subnode.  Valid pins are:
		    mpp1-mpp4 for pm8841
		    mpp1-mpp4 for pm8916
		    mpp1-mpp8 for pm8941
		    mpp1-mpp4 for pma8084

- function:
	Usage: required
	Value type: <string>
	Definition: Specify the alternative function to be configured for the
		    specified pins.  Valid values are:
		    "digital",
		    "analog",
		    "sink"

- bias-disable:
	Usage: optional
	Value type: <none>
	Definition: The specified pins should be configured as no pull.

- bias-pull-up:
	Usage: optional
	Value type: <u32>
	Definition: The specified pins should be configured as pull up.
		    Valid values are 600, 10000 and 30000 in bidirectional mode
		    only, i.e. when operating in qcom,analog-mode and input and
		    outputs are enabled. The hardware ignores the configuration
		    when operating in other modes.

- bias-high-impedance:
	Usage: optional
	Value type: <none>
	Definition: The specified pins will put in high-Z mode and disabled.

- input-enable:
	Usage: optional
	Value type: <none>
	Definition: The specified pins are put in input mode, i.e. their input
		    buffer is enabled

- output-high:
	Usage: optional
	Value type: <none>
	Definition: The specified pins are configured in output mode, driven
		    high.

- output-low:
	Usage: optional
	Value type: <none>
	Definition: The specified pins are configured in output mode, driven
		    low.

- power-source:
	Usage: optional
	Value type: <u32>
	Definition: Selects the power source for the specified pins. Valid power
		    sources are defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>

- qcom,analog-level:
	Usage: optional
	Value type: <u32>
	Definition: Selects the source for analog output. Valued values are
		    defined in <dt-binding/pinctrl/qcom,pmic-mpp.h>
		    PMIC_MPP_AOUT_LVL_*

- qcom,dtest:
	Usage: optional
	Value type: <u32>
	Definition: Selects which dtest rail to be routed in the various functions.
		    Valid values are 1-4

- qcom,amux-route:
	Usage: optional
	Value type: <u32>
	Definition: Selects the source for analog input. Valid values are
		    defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
		    PMIC_MPP_AMUX_ROUTE_CH5, PMIC_MPP_AMUX_ROUTE_CH6...
- qcom,paired:
	Usage: optional
	Value type: <none>
	Definition: Indicates that the pin should be operating in paired mode.

Example:

	mpps@a000 {
		compatible = "qcom,pm8841-mpp", "qcom,spmi-mpp";
		reg = <0xa000>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupts = <4 0xa0 0 0>, <4 0xa1 0 0>, <4 0xa2 0 0>, <4 0xa3 0 0>;

		pinctrl-names = "default";
		pinctrl-0 = <&pm8841_default>;

		pm8841_default: default {
			gpio {
				pins = "mpp1", "mpp2", "mpp3", "mpp4";
				function = "digital";
				input-enable;
				power-source = <PM8841_MPP_S3>;
			};
		};
	};