summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/thermal/uniphier-thermal.txt
blob: ceb92a95727a8aadb79dbfe9e222ced65449d6c7 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
* UniPhier Thermal bindings

This describes the devicetree bindings for thermal monitor supported by
PVT(Process, Voltage and Temperature) monitoring unit implemented on Socionext
UniPhier SoCs.

Required properties:
- compatible :
  - "socionext,uniphier-pxs2-thermal" : For UniPhier PXs2 SoC
  - "socionext,uniphier-ld20-thermal" : For UniPhier LD20 SoC
  - "socionext,uniphier-pxs3-thermal" : For UniPhier PXs3 SoC
- interrupts : IRQ for the temperature alarm
- #thermal-sensor-cells : Should be 0. See ./thermal.txt for details.

Optional properties:
- socionext,tmod-calibration: A pair of calibrated values referred from PVT,
                              in case that the values aren't set on SoC,
                              like a reference board.

Example:

	sysctrl@61840000 {
		compatible = "socionext,uniphier-ld20-sysctrl",
			     "simple-mfd", "syscon";
		reg = <0x61840000 0x10000>;
		...
		pvtctl: pvtctl {
			compatible = "socionext,uniphier-ld20-thermal";
			interrupts = <0 3 1>;
			#thermal-sensor-cells = <0>;
		};
		...
	};

	thermal-zones {
		cpu_thermal {
			polling-delay-passive = <250>;	/* 250ms */
			polling-delay = <1000>;		/* 1000ms */
			thermal-sensors = <&pvtctl>;

			trips {
				cpu_crit: cpu_crit {
					temperature = <110000>;	/* 110C */
					hysteresis = <2000>;
					type = "critical";
				};
				cpu_alert: cpu_alert {
					temperature = <100000>;	/* 100C */
					hysteresis = <2000>;
					type = "passive";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu_alert>;
					cooling-device = <&cpu0 (-1) (-1)>;
				};
				map1 {
					trip = <&cpu_alert>;
					cooling-device = <&cpu2 (-1) (-1)>;
				};
			};
		};
	};