summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/timer/mediatek,mtk-timer.txt
blob: 8bbb6e94508b25c5773f9e8436cac9575215bf6a (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
MediaTek Timers
---------------

MediaTek SoCs have different timers on different platforms,
- CPUX (ARM/ARM64 System Timer)
- GPT (General Purpose Timer)
- SYST (System Timer)

The proper timer will be selected automatically by driver.

Required properties:
- compatible should contain:
	For those SoCs that use GPT
	* "mediatek,mt2701-timer" for MT2701 compatible timers (GPT)
	* "mediatek,mt6580-timer" for MT6580 compatible timers (GPT)
	* "mediatek,mt6582-timer" for MT6582 compatible timers (GPT)
	* "mediatek,mt6589-timer" for MT6589 compatible timers (GPT)
	* "mediatek,mt7623-timer" for MT7623 compatible timers (GPT)
	* "mediatek,mt8127-timer" for MT8127 compatible timers (GPT)
	* "mediatek,mt8135-timer" for MT8135 compatible timers (GPT)
	* "mediatek,mt8173-timer" for MT8173 compatible timers (GPT)
	* "mediatek,mt8516-timer" for MT8516 compatible timers (GPT)
	* "mediatek,mt6577-timer" for MT6577 and all above compatible timers (GPT)

	For those SoCs that use SYST
	* "mediatek,mt8183-timer" for MT8183 compatible timers (SYST)
	* "mediatek,mt8186-timer" for MT8186 compatible timers (SYST)
	* "mediatek,mt8188-timer" for MT8188 compatible timers (SYST)
	* "mediatek,mt8192-timer" for MT8192 compatible timers (SYST)
	* "mediatek,mt8195-timer" for MT8195 compatible timers (SYST)
	* "mediatek,mt7629-timer" for MT7629 compatible timers (SYST)
	* "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST)

	For those SoCs that use CPUX
	* "mediatek,mt6795-systimer" for MT6795 compatible timers (CPUX)

- reg: Should contain location and length for timer register.
- clocks: Should contain system clock.

Examples:

	timer@10008000 {
		compatible = "mediatek,mt6577-timer";
		reg = <0x10008000 0x80>;
		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
		clocks = <&system_clk>;
	};