summaryrefslogtreecommitdiffstats
path: root/dts/src/arm/imx6qdl-phytec-mira-peb-wlbt-05.dtsi
blob: 84f884d6e55bc2af7237dc7d5ca4a919e3289959 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2021 PHYTEC Messtechnik GmbH
 * Author: Yunus Bas <y.bas@phytec.de>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	reg_wl_en: regulator-wl-en {
		compatible = "regulator-fixed";
		regulator-name = "wlan_en";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wl>;
		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		startup-delay-us = <100>;
		status = "disabled";
	};
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3_bt>;
	uart-has-rtscts;

	bluetooth {
		compatible = "brcm,bcm43438-bt";
		shutdown-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
		device-wakeup-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
		host-wakeup-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
		status = "disabled";
	};
};

&usdhc3 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3_wl>;
	vmmc-supply = <&reg_wl_en>;
	bus-width = <4>;
	non-removable;
	no-1-8-v;
	status = "disabled";

	brmcf: wifi@1 {
		compatible = "brcm,bcm4329-fmac";
		reg = <1>;
	};
};

&iomuxc {
	pinctrl_uart3_bt: uart3grp-bt {
		fsl,pins = <
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_EB3__UART3_RTS_B		0x1b0b1
			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0xb0b1	/* BT ENABLE */
			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0xb0b1	/* DEV WAKEUP */
			MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0xb0b1  /* HOST WAKEUP */
		>;
	};

	pinctrl_usdhc3_wl: usdhc3grp-wl {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
		>;
	};

	pinctrl_wl: wlgrp {
		fsl,pins = <
			MX6QDL_PAD_EIM_A25__GPIO5_IO02      0xb0b1	/* WLAN ENABLE */
		>;
	};
};