summaryrefslogtreecommitdiffstats
path: root/dts/src/arm/intel-ixp45x-ixp46x.dtsi
blob: cce49e80904359bd40dd5114e232d61b567906ab (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
// SPDX-License-Identifier: ISC
/*
 * Device Tree file for Intel XScale Network Processors
 * in the IXP45x and IXP46x series. This series has 64 interrupts and adds a
 * few more peripherals over the 42x and 43x series so this extends the
 * basic IXP4xx DTSI.
 */
#include "intel-ixp4xx.dtsi"

/ {
	soc {
		interrupt-controller@c8003000 {
			compatible = "intel,ixp43x-interrupt";
		};

		/*
		 * This is the USB Device Mode (UDC) controller, which is used
		 * to present the IXP4xx as a device on a USB bus.
		 */
		usb@c800b000 {
			compatible = "intel,ixp4xx-udc";
			reg = <0xc800b000 0x1000>;
			interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		i2c@c8011000 {
			compatible = "intel,ixp4xx-i2c";
			reg = <0xc8011000 0x18>;
			interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		/* This is known as EthB1 */
		ethernet@c800d000 {
			compatible = "intel,ixp4xx-ethernet";
			reg = <0xc800d000 0x1000>;
			status = "disabled";
			intel,npe = <1>;
			/* Dummy values that depend on firmware */
			queue-rx = <&qmgr 0>;
			queue-txready = <&qmgr 0>;
		};

		/* This is known as EthB2 */
		ethernet@c800e000 {
			compatible = "intel,ixp4xx-ethernet";
			reg = <0xc800e000 0x1000>;
			status = "disabled";
			intel,npe = <2>;
			/* Dummy values that depend on firmware */
			queue-rx = <&qmgr 0>;
			queue-txready = <&qmgr 0>;
		};

		/* This is known as EthB3 */
		ethernet@c800f000 {
			compatible = "intel,ixp4xx-ethernet";
			reg = <0xc800f000 0x1000>;
			status = "disabled";
			intel,npe = <3>;
			/* Dummy values that depend on firmware */
			queue-rx = <&qmgr 0>;
			queue-txready = <&qmgr 0>;
		};
	};
};