dts/src/arm/sunxi-bananapi-m2-plus-v1.2.dtsi


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
 */

#include "sunxi-bananapi-m2-plus.dtsi"

/ {
	/*
	 * Bananapi M2+ v1.2 uses a GPIO line to change the effective
	 * resistance on the CPU regulator's feedback pin.
	 */
	reg_vdd_cpux: vdd-cpux {
		compatible = "regulator-gpio";
		regulator-name = "vdd-cpux";
		regulator-type = "voltage";
		regulator-boot-on;
		regulator-always-on;
		regulator-min-microvolt = <1100000>;
		regulator-max-microvolt = <1300000>;
		regulator-ramp-delay = <50>; /* 4ms */
		gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
		gpios-states = <0x1>;
		states = <1100000 0x0
			  1300000 0x1>;
	};
};

&cpu0 {
	cpu-supply = <&reg_vdd_cpux>;
};