summaryrefslogtreecommitdiffstats
path: root/dts/src/arm64/marvell/cn9130-db.dts
blob: 994f347f29732a3494f572a7c58480c045ac2522 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2019 Marvell International Ltd.
 *
 * Device tree for the CN9130-DB board.
 */

#include "cn9130-db.dtsi"

/ {
	model = "Marvell Armada CN9130-DB setup A";
};

/* Setup A has SPI1 flash as a boot device, while setup B uses NAND flash.
 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
 * simultaneously. When SPI controller is enabled, NAND should be disabled.
 */

&cp0_spi1 {
	status = "okay";
};